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QS7779CM Datasheet(PDF) 6 Page - Nippon Precision Circuits Inc

Part # QS7779CM
Description  3D Stereo Enhancement and 3D Virtual Stereo Surround with Dolby Pro Logic and Mixed DVD (AC-3) Decoder
PDF  11 Pages
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Manufacturer  NPC [Nippon Precision Circuits Inc]
Direct Link  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

QS7779CM Datasheet(HTML) 6 Page - Nippon Precision Circuits Inc

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QS7779PM/CM
NIPPON PRECISION CIRCUITS—6
AC Electrical Characteristics
VCC = 9V, VDD = 5V, GND = 0V, Ta = 25 °C unless otherwise noted.
Parameter
Symbol
Condition
Limits
Unit
min
typ
m a x
Maxim um input voltage 1
V FIN1
LIN = RIN, BYP = LOW , SPRD = HIGH,
f = 1kHz
1.4
–
–
V RMS
Maxim um input voltage 2
V FIN2
LIN = – RIN, BYP = LOW , SPRD = HIGH,
f = 1kHz
0.5
–
–
V RMS
Bypass gain
G BYP
BYP = HIGH, f = 1kHz, LIN to LOUT,
RIN to RO U T
– 2
0
2
d B
Forward gain
G F
SPRD = HIGH, BYP = LOW , f = 1kHz,
LIN to LOUT, RIN to RO U T
6.6
8.6
10.6
d B
Crosstalk gain
G XF
SPRD = HIGH, BYP = LOW , f = 1kHz,
LIN to RO U T, RIN to LOUT
0.5
2.5
4.5
d B
SCL clock pulse cycle
t0
P M version
1 0 0
–
–
ns
SCL HIGH-level clock pulse width
t1
P M version
4 0
–
–
ns
SCL LOW -level clock pulse width
t2
P M version
4 0
–
–
ns
S D A set-up time
t3
P M version
1 5
–
–
ns
S D A hold time
t4
P M version
3 0
–
–
ns
STRB set-up time
t5
P M version
5 0
–
–
ns
STRB clock pulse width
t6
P M version
1 0 0
–
–
ns
STRB hold time
t7
P M version
5 0
–
–
ns
SCL hold time (I2C)
tHD:STA
C M version
4.0
–
–
µs
SCL set-up time (I2C)
tSU:STO
C M version
4.0
–
–
µs
S D A hold time (I2C)
tHD:DAT
C M version
5.0
–
–
µs
S D A set-up time (I2C)
tSU:DAT
C M version
2 5 0
–
–
ns
SCL HIGH-level clock pulse width
(I2C)
tHIGH
C M version
4.0
–
–
µs
SCL LOW -level clock pulse width
(I2C)
tLOW
C M version
4.7
–
–
µs
SCL r ise time (I2C)
tr
C M version
–
–
1000
ns
SCL fall time (I2C)
tf
C M version
–
–
3 0 0
ns



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