M37271MF-252SP datasheet(56/97 Pages) MITSUBISHI

56 / 97 page

MITSUBISHI MICROCOMPUTERS

M37271MF-XXXSP

M37271EF-XXXSP, M37271EFSP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

(5) Field Determination Display

To display the block with vertical dot size of 1/2H, whether an even

field or an odd field is determined through differences in a synchro-

nizing signal waveform of interlacing system. The dot line 0 or 1 (re-

fer to Figure 65) corresponding to the field is displayed alternately.

In the following, the field determination standard for the case where

both the horizontal sync signal and the vertical sync signal are nega-

tive-polarity inputs will be explained. A field determination is deter-

mined by detecting the time from a falling edge of the horizontal sync

signal until a falling edge of the VSYNC control signal (refer to Figure

57) in the microcomputer and then comparing this time with the time

of the previous field. When the time is longer than the comparing

time, it is regarded as even field. When the time is shorter, it is re-

garded as odd field

The contents of this field can be read out by the field determination

flag (bit 7 of the I/O polarity control register at address 021716). A dot

line is specified by bit 6 of the I/O polarity control register (refer to

Figure 65).

However, the field determination flag read out from the CPU is fixed

to “0” at even field or “1” at odd field, regardless of bit 6.

Fig. 64. Structure of I/O polarity control register

I/O polarity control register

(PC : address 021716)

HSYNC input polarity switch bit

0 : Positive polarity input

1 : Negative polarity input

OUT2 output polarity switch bit

0 : Positive polarity output

1 : Negative polarity output

VSYNC input polarity switch bit

0 : Positive polarity input

1 : Negative polarity input

R/G/B output polarity switch bit

0 : Positive polarity output

1 : Negative polarity output

I1, I2 output polarity switch bit

0 : Positive polarity output

1 : Negative polarity output

OUT1 output polarity switch bit

0 : Positive polarity output

1 : Negative polarity output

Display dot line selection bit (Note)

Field determination flag

0 : Even field

1 : Odd field

Note : Refer to Figure 65.

“

” at odd field

“

” at odd field

1 : “

” at even field

0 : “

” at even field

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