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MH89625C Datasheet(PDF) 2 Page - Mitel Networks Corporation |
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MH89625C Datasheet(HTML) 2 Page - Mitel Networks Corporation |
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2 / 16 page ![]() 2-270 MH89625C Preliminary Information Figure 2 - Pin Connections Pin Description Pin # Name Description 1TIP Tip Lead. Connects to the “Tip” lead of the telephone line. 2 RING Ring Lead. Connects to the “Ring” lead of the telephone line. 3IC Internal Connection: This pin is internally connected. 4IC Internal Connection: This pin is internally connected. 5IC Internal Connection: This pin is internally connected. 6RF1 Ring Feed 1: For OPS operation, connects to the external battery backed ringing generator, see Figure 2. 7RF2 Ring Feed 2: For OPS operation, connects to RING through a normally closed relay contact (K1), see Figure 2. 8IC Internal Connection. This pin is internally connected. 9VEE Negative Supply Voltage: (-5V) 10 SHK Switch Hook Detect (Output): A logic low indicates an off-hook condition. 11 LED LED Drive (Output): Drives an LED directly through an internal 2.2k Ω resistor. A logic low indicates an off-hook condition. 12 CSTi Control ST-BUS in (Input): A TTL compatible digital input used to control the function of the filter/codec. Three modes of operation may be affected by applying to this input logic high, logic low or an 8-bit serial word, depending on the logic states of CA and F1i. Functions controlled are: power down, filter gain adjust, loopback, chip testing, and the SD outputs which control the relay drivers, ring trip circuitry and impedance selection. 13 DSTi Data ST-BUS in (Input): A TTL compatible digital input which accepts the 8-bit PCM word from the incoming PCM bus. 14 C2i Clock Input (Input): A TTL compatible digital input which accepts the 2048 kHz clock. 15 DSTo Data ST-BUS Out (Output). A three stage TTL compatible digital output which drives the 8-bit PCM word to the outgoing PCM bus. 16 F1i Synchronization Input (Input): A TTL compatible active low digital input enabling (in conjunction with CA) the PCM input, PCM output and digital control input. It is internally sampled on every positive edge of the clock, C2i, and provides frame and channel synchronization. IC IC VBAT LGND GS VAC IC LCA VDD AGND IC IC IC IC IC VREF VRLY RD4 RD3 IC RING IC IC IC RF1 RF2 IC VEE SHK LED CSTi DSTi C2i DSTo F1i CA RGND RD2 RD1 TIP 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 1 |
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