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MT89L85AP Datasheet(PDF) 2 Page - Mitel Networks Corporation

Part # MT89L85AP
Description  CMOS ST-BUS??FAMILY Enhanced Digital Switch
PDF  20 Pages
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT89L85AP Datasheet(HTML) 2 Page - Mitel Networks Corporation

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MT89L85
Advance Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
44
PLCC
48
SSOP
22
DTA
Data Acknowledgment (Open Drain Output). This active low output indicates that a
data bus transfer is complete. A pull-up resistor is required at this output.
3-5
7-11
3-5
7-11
STi0-
STi7
ST-BUS Input 0 to 7 (Inputs). Serial data input streams. These streams have 32
channels at data rates of 2.048 Mbit/s.
12
12,36
VDD
+3.3 Volt Power Supply.
13
RESET Device Reset (5v-tolerant input). This pin is only available for the 48-pin SSOP
package. This active low input puts the MT89L85 in its reset state. It clears the internal
counters anf registers. All ST-BUS outputs are set to the high impedance state. This
RESET pin must be held low for a minimum of 100nsec to reset the device.
13
14
F0i
Frame Pulse (Input). This input accepts and automatically identifies frame
synchronization signals formatted according to different backplane specifications such
as ST-BUS and GCI.
14
15
C4i
Clock (Input). 4.096 MHz serial clock for shifting data in and out of the data streams.
15-17
19-21
16-18
20-22
A0-A5 Address 0 to 5 (Inputs). These lines provide the address to MT89L85 internal
registers.
22
23
DS
Data Strobe (Input). This is the input for the active high data strobe on the
microprocessor interface. This input operates with CS to enable the internal read and
write generation.
(JEDEC MO-118, 300mil Wide)
7
8
9
10
11
12
13
14
15
16
39
38
37
36
35
34
33
32
31
30
17
29
STi3
STi4
STi5
STi6
STi7
VDD
F0i
C4i
A0
A1
A2
STo3
STo4
STo5
STo6
STo7
VSS
D0
D1
D2
D3
D4
44 PIN PLCC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
48 PIN SSOP
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
ODE
STo0
STo1
STo2
NC
STo3
STo4
STo5
STo6
STo7
VSS
VDD
D0
D1
D2
D3
D4
NC
D5
D6
DTA
STi0
STi1
STi2
NC
STi3
STi4
STi5
STi6
STi7
VDD
RESET
F0i
C4i
A0
A1
A2
NC
A3
A4
48
CSTo
VSS
21
27
D7
A5
22
26
CS
DS
23
25
VSS
R/W
24



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