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MT89L86AP Datasheet(PDF) 2 Page - Mitel Networks Corporation

Part # MT89L86AP
Description  CMOS ST-BUS??FAMILY Multiple Rate Digital Switch
PDF  40 Pages
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT89L86AP Datasheet(HTML) 2 Page - Mitel Networks Corporation

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MT89L86
Advance Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
44
PLCC
48
SSOP
22
DTA
Data Acknowledgment (Open Drain Output). This active low output indicates that a
data bus transfer is complete. A pull-up resistor is required at this output.
3-5
7-9
3-5
7-9
STi0-5
ST-BUS Inputs 0 to 5 (5V-tolerant Inputs). Serial data input streams. These streams
may have data rates of 2.048, 4.096 or 8.192 Mbit/s with 32, 64 or 128 channels,
respectively.
10
10
STi6/A6
ST-BUS Input 6/Addr.6 input (5V-tolerant Input). The function of this pin is determined
by the switching configuration enabled. If non-multiplexed CPU bus is used along with
a higher input rate of 8.192 or 4.096 Mb/s, this pin provides A6 address input function.
For 2.048 and 4.096 Mb/s (8x4) applications or when the multiplexed CPU bus
interface is selected, this pin assumes STi6 function. See Control Register bits
description and Tables 1, 2, 6 & 7 for more details.
Note that for applications where both A6 and STi6 inputs are required simultaneously
(e.g., 8 x 4 switching configuration at 4.096 Mb/s or rate conversion between 2.048Mb/
s to 4.196 or 8.192 Mb/s) the A6 input should be connected to pin STo6/A6.
11
11
STi7/A7
ST-BUS Input 7/Addr.7 input (5V-tolerant Input): The function of this pin is determined
by the switching configuration enabled. If non-multiplexed CPU bus is used along with
a higher input rate of 8.192 Mb/s, this pin provides A7 address input function.
For 2.048 and 4.096 Mb/s (8x4) applications or when the multiplexed CPU bus is
selected, this pin assumes STi7 function. See Control Register bits description and
Tables 1, 2, 6 & 7 for more details.
Note that for applications where both A7 and STi7 inputs are required simultaneously
(e.g., 2.048 to 8.192 Mb/s rate conversion) the A7 input should be connected to pin
STo7/A7.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
48 PIN SSOP
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
ODE
STo0
STo1
STo2
STi14/STo8
STo3
STo4
STo5
STo6/A6
STo7/A7
VSS
VDD
AD0
AD1
AD2
AD3
AD4
STi15/STo9
AD5
AD6
DTA
STi0
STi1
STi2
AS/ALE
STi3
STi4
STi5
STi6/A6
STi7/A7
VDD
RESET
FR
CLK
STi8/A0
STi9/A1
STi10/A2
IM
STi11/A3
STi12/A4
1
6 5 4 3 2
44 43 42 41 40
7
8
9
10
11
12
13
14
15
16
39
38
37
36
35
34
33
32
31
30
23
18 19 20 21 22
24 25 26 27 28
17
29
STo3
STo4
STo5
STo6/A6
STo7/A7
VSS
AD0
AD1
AD2
AD3
AD4
STi3
STi4
STi5
STi6/A6
STi7/A7
VDD
FR
CLK
STi8/A0
STi9/A1
STi10/A2
44 PIN PLCC
48
CSTo
VSS
21
27
AD7
STi13/A5
22
26
CS
DS/RD
23
25
VSS
R/W\WR
24
(JEDEC MO-118, 300mil Wide)



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