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MT93L16 Datasheet(PDF) 16 Page - Mitel Networks Corporation |
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MT93L16 Datasheet(HTML) 16 Page - Mitel Networks Corporation |
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16 / 27 page ![]() MT93L16 Preliminary Information 16 Figure 11 -GCI Data Port Timing ) Figure 12 - ST-BUS Data Port Timing Figure 13 - SSI Data Port Timing Sout/Rout (O) VCT C4i (I) VH VL VCT F0i (I) VH VL VCT Rin/Sin (I) VH VL VCT tF0iS tF0iH tDSS tDSH tDSD tASHZ tC4H tC4L Bit 6 Bit 7 Bit 6 start of frame Bit 7 Sout/Rout (O) VCT C4i (I) VH VL VCT F0i (I) VH VL VCT Rin/Sin (I) VH VL VCT tF0iS tF0iH tDSS tDSH tDSD tASHZ tC4H tC4L Bit 7 Bit 6 Bit 6 start of frame Bit 7 Sout/Rout (O) VCT BCLK (I) VH VL VCT ENA1 (I) VH VL VCT Rin/Sin (1) VH VL VCT tSD tSSS tDD tAHZ tSSH tDIS tDIH tBCP tBCH tBCL Bit 7 Bit 6 or ENA2 (I) start of frame Bit 5 Bit 7 Bit 6 Bit 5 Notes: O. CMOS output I. CMOS input (5V tolerant) (see Table 8 for symbol definitions) |
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