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100328F Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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100328F Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 12 page ![]() Functional Diagram Detail Truth Table OE DIR LE ECL TTL Notes Port Port L X L LOW Z (Cut-Off) L L H Input Z (Notes 1, 3) L H H LOW Input (Notes 2, 3) (Cut-Off) H L L L L (Notes 1, 4) H L L H H (Notes 1, 4) H L H X Latched (Notes 1, 3) H H L L L (Notes 2, 4) H H L H H (Notes 2, 4) H H H Latched X (Notes 2, 4) H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance Note 1: ECL input to TTL output mode. Note 2: TTL input to ECL output mode. Note 3: Retains data present before LE set HIGH. Note 4: Latch is transparent. DS100295-5 Note: LE, DIR, and OE use ECL logic levels DS100295-6 www.national.com 3 |
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