Military Version

ECL-to-TTL DC Electrical Characteristics

V

Symbol

Parameter

Min

Max Units

T

C

Conditions

Notes

V

OH

Output HIGH Voltage

2.5

mV

0˚C to +125˚C

I

(Notes 7, 8, 9)

2.4

−55˚C

V

OL

Output LOW Voltage

0.5

mV

−55˚C

I

+125˚C

V

IH

Input HIGH Voltage

−1165

−870

mV

−55˚C

Guaranteed HIGH Signal

(Notes 7, 8, 9, 10)

+125˚C

for All Inputs

V

IL

Input LOW Voltage

−1830 −1475

mV

−55˚C to

Guaranteed LOW Signal

(Notes 7, 8, 9, 10)

+125˚C

for All Inputs

I

IH

Input HIGH Current

350

µA

0˚C to

V

(Notes 7, 8, 9)

500

+125˚C

V

I

IL

Input LOW Current

0.50

µA

−55˚C to

V

(Notes 7, 8, 9)

+125˚C

V

I

OZHT

TRI-STATE Current

70

µA

−55˚C to

V

(Notes 7, 8, 9)

Output High

+125˚C

I

OZLT

TRI-STATE Current

−1.0

mA

−55˚C to

V

(Notes 7, 8, 9)

Output Low

+125˚C

I

OS

Output Short-Circuit

−60

−150

mA

−55˚C to

V

(Notes 7, 8, 9)

CURRENT

+125˚C

I

TTL

V

70

mA

−55˚C to

TTL Outputs Low

(Notes 7, 8, 9)

47

mA

+125˚C

TTL Output High

70

mA

TTL Output in TRI-STATE

Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately

without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case

condition at cold temperatures.

Note 8: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups, 1, 2 3, 7, and 8.

Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.

Military Version

TTL-to-ECL AC Electrical Characteristics

V

Symbol

Parameter

T

T

T

+125˚C

Units

Conditions

Notes

Min

Max

Min

Max

Min

Max

t

PLH

CP to E

n

1.3

3.8

1.6

3.7

1.9

4.3

ns

Figures 1, 2

(Notes 11,

12, 13)

t

PHL

ns

t

PZH

OE to E

n

1.0

4.3

1.5

4.4

1.7

9.0

ns

Figures 1, 2

(Notes 11,

12, 13)

(Cutoff to HIGH)

t

PHZ

OE to E

n

1.5

5.0

1.6

4.5

1.6

5.0

ns

Figures 1, 2

(HIGH to Cutoff)

t

PHZ

DIR to E

n

1.6

4.7

1.6

4.3

1.7

4.7

ns

Figures 1, 2

(HIGH to Cutoff)

t

set

T

2.5

2.0

2.5

ns

Figures 1, 2

(Note 14)

t

hold

T

2.5

2.0

2.5

ns

Figures 1, 2

t

Pulse Width CP

2.5

2.0

2.5

ns

Figures 1, 2

(Note 14)

t

TLH

Transition Time

0.4

2.3

0.5

2.1

0.4

2.4

ns

Figures 1, 2

(Note 14)

t

THL

20% to 80%,80% to 20%

f

MAX

CP

250

250

250

MHz

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