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100329F Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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100329F Datasheet(HTML) 8 Page - National Semiconductor (TI) |
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8 / 11 page ![]() Test Circuitry (ECL-to-TTL) Switching Waveforms (ECL-to-TTL) DS100306-10 Note 18: RT = 50Ω termination resistive load. When an input or output is being monitored by a scope, RTis supplied by the scope’s 50Ω input resistance. When an input or output is not being monitored, an external 50 Ω resistance must be applied to serve as RT. Note 19: The TTL TRI-STATE pull-up switch is connected to +7V only for ZL and LZ tests. Note 20: TTL and ECL force signals are brought to the DUT via 50 Ω coax lines. Note 21: VTTL is decoupled to ground with 0.1 µF, VEE is decoupled to ground with 0.01 µF and VCC is connected to ground. FIGURE 3. ECL-to-TTL AC Test Circuit DS100306-11 Note: DIR is LOW, OE is HIGH FIGURE 4. ECL-to-TTL Transition — Propagation Delay and Transition Times www.national.com 8 |
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