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TS321ID Datasheet(PDF) 11 Page - Texas Instruments |
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TS321ID Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 21 page ![]() NC VCC+ IN1 í IN1+ VCC í NC OUT NC RG RIN RF GND VIN VS- GND VS+ GND Run the input traces as far away from the supply lines as possible Only needed for dual-supply operation Place components close to device and to each other to reduce parasitic errors Use low-ESR, ceramic bypass capacitor (or GND for single supply) Ground (GND) plane on another layer VOUT + RIN RG RF VOUT VIN TS321 www.ti.com SLOS489C – DECEMBER 2005 – REVISED APRIL 2015 Layout Guidelines (continued) opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible. Keeping RF and RG close to the inverting input minimizes parasitic capacitance, as shown in Layout Example. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 Layout Example Figure 10. Operational Amplifier Schematic for Noninverting Configuration Figure 11. Operational Amplifier Board Layout for Noninverting Configuration Copyright © 2005–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TS321 |
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