TAS5756M datasheet(8/104 Pages) TI1

8 / 104 page

28 V

ESD

SPK_FAULT

100

TAS5756M

SLAS988B – JUNE 2014 – REVISED AUGUST 2015

www.ti.com

Internal Pin Configurations (continued)

Figure 17. SPK_FAULT Pin

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Low-voltage digital, analog, charge pump

DVDD, AVDD, CPVDD

–0.3

3.9

supply

PVDD supply

PVDD

–0.3

Input voltage for SPK_GAIN/FREQ and

VI(AmpCtrl)

–0.3

VGVDD + 0.3

SPK_FAULT pins

DVDD referenced digital inputs(2)

VI(DigIn)

–0.5

VDVDD + 0.5

Analog input into speaker amplifier

VI(SPK_INxx)

–0.3

6.3

Voltage at speaker output pins

VI(SPK_OUTxx)

–0.3

Ambient operating temperature, TA

–25

°C

Storage temperature, Tstg

–40

125

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

DVDD referenced digital pins include: ADR0, ADR1, GPIO0, GPIO1, GPIO2, LRCK/FS, MCLK, SCL, SCLK, SDA, SDIN, and

SPK_MUTE.

7.2 ESD Ratings

VALUE

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

Electrostatic

V(ESD)

discharge

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±500

(1)

JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.

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