AP3595 datasheet(11/23 Pages) DIODES

11 / 23 page

AP3595

Document number: DS36749 Rev. 1 - 2

11 of 23

www.diodes.com

January 2014

AP3595

A Product Line of

Diodes Incorporated

Application Information (Cont.)

As mentioned in the above section, the slew rate of voltage transition at SS pin and VOUT during soft start and VREFIN jumping is controlled by the

capacitor connected to the SS pin. This reduces inrush current to charge/discharge the large output capacitors during soft start and VID changing,

and prevents OCP, OVP/UVP false trigger. The SS buffer sinking/sourcing capability is limited to 22

A during soft start and 200A after soft start

end. Therefore, the slew rate of voltage ramping up/down at SS, EAP and FB pin during soft start or VID changing is calculated as:

During Soft Start

After Soft Start

4. Pre-Bias Function

AP3595 features pre-bias start-up capability. If the output voltage is pre-biased with a voltage VBIAS, that accordingly makes VFB higher than

reference voltage ramping VEAP. The error amplifier keeps VCOMP lower than the valley of the saw tooth waveform and makes PWM comparators

output low until the ramping VEAP catches up the feedback voltage. The IC keeps both upper and lower MOSFETs off until the first pulse takes

place.

5. Chip Oscillator Frequency Programming

A resistor RFS connected to RT/EN pin programs the oscillator frequency as:

)

(

)

(

10000

kHz

OSC





Figure 2 shows the relationship between oscillation frequency and RFS.

Figure 2. Switching Frequency vs. RFS

When released, the RT/EN pin voltage is regulated at 1V. Pulling the RT/EN pin to ground shuts down the IC.

6. Current Balance

AP3595 extracts phase currents for current balance by parasitic on-resistance of the lower switches when turned on as shown in Figure 3.

Figure 3. RDS(ON) Current Sensing Scheme

The GM amplifier senses the voltage drop across the lower switch and converts it into current signal when it turns on. The sampled and held

current is expressed as:

)

(

CSX











EAP





EAP



200



RFS (k)

Sample

&Hold

Current

Balance

ICS1

ICS2

Reference

Voltage

PHASE

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