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LMK03328 Datasheet(PDF) 79 Page - Texas Instruments

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Part # LMK03328
Description  Ultra-Low Jitter Clock Generator
PDF  153 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMK03328 Datasheet(HTML) 79 Page - Texas Instruments

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LMK03328
www.ti.com
SNAS668A – AUGUST 2015 – REVISED JANUARY 2016
79
Product Folder Links: LMK03328
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated
Register Maps (continued)
Name
Addr
Reset
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
PLL1_NDIV_BY0 59
0x66
PLL1_NDIV[7:0]
PLL1_
FRACNUM_BY2
60
0x00
RESERVED
PLL1_NUM[21:16]
PLL1_
FRACNUM_BY1
61
0x00
PLL1_NUM[15:8]
PLL1_
FRACNUM_BY0
62
0x00
PLL1_NUM[7:0]
PLL1_
FRACDEN_BY2
63
0x00
RESERVED
PLL1_DEN[21:16]
PLL1_
FRACDEN_BY1
64
0x00
PLL1_DEN[15:8]
PLL1_
FRACDEN_BY0
65
0x00
PLL1_DEN[7:0]
PLL1_
MASHCTRL
66
0x0C
RESERVED
PLL1_DTHRMODE[1:0]
PLL1_ORDER[1:0]
PLL1_LF_R2
67
0x24
RESERVED
PLL1_LF_R2[5:0]
PLL1_LF_C1
68
0x00
RESERVED
PLL1_LF_C1[2:0]
PLL1_LF_R3
69
0x00
RESERVED
PLL1_LF_R3[6:0]
PLL1_LF_C3
70
0x00
RESERVED
PLL1_LF_C3[2:0]
PLL2_CTRL0
71
0x1E
RESERVED
PLL2_P[2:0]
PLL2_SYNC_EN
PLL2_PDN
PLL2_CTRL1
72
0x18
RESERVED
SEC_D
PLL2_CP[3:0]
PLL2_NDIV_BY1 73
0x00
RESERVED
PLL2_NDIV[11:8]
PLL2_NDIV_BY0 74
0x64
PLL2_NDIV[7:0]
PLL2_
FRACNUM_BY2
75
0x00
RESERVED
PLL2_NUM[21:16]
PLL2_
FRACNUM_BY1
76
0x00
PLL2_NUM[15:8]
PLL2_
FRACNUM_BY0
77
0x00
PLL2_NUM[7:0]
PLL2_
FRACDEN_BY2
78
0x00
RESERVED
PLL2_DEN[21:16]
PLL2_
FRACDEN_BY1
79
0x00
PLL2_DEN[15:8]
PLL2_
FRACDEN_BY0
80
0x00
PLL2_DEN[7:0]
PLL2_
MASHCTRL
81
0x0C
RESERVED
PLL2_DTHRMODE[1:0]
PLL2_ORDER[1:0]
PLL2_LF_R2
82
0x24
RESERVED
PLL2_LF_R2[5:0]



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