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LTC6954 Datasheet(PDF) 4 Page - Linear Technology

Part # LTC6954
Description  Low Phase Noise, Triple Output Clock Distribution Divider/Driver
PDF  10 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC6954 Datasheet(HTML) 4 Page - Linear Technology

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dc1954af
DEMO MANUAL DC1954A
Troubleshooting
If the board is not functioning as expected, follow the
instructions below:
1. Verify that you are able to communicate with the
DC1954A. The bottom status line in LTC6954_GUI
should read LTC6954 and Comm Enabled.
2. Verify that V+ 3.15V-3.45V turret has the correct
voltage. (see the Typical DC1954A Requirements and
Characteristics table).
3. Ensure JP1, JP2, and JP3 are set to desired position.
4. IftheoutputtypeisLVPECLandtheoutputisAC-coupled,
OUTxSEL must be high for proper signal swing.
The DC1954A allows for a variety of input and output
configurations. The following covers the hardware recon-
figuration of the DC1954A.
LVPECL Output Options
TheDC1954ALVPECLoutputsareAC-coupledandrequire
internalbiasing(OUTxSEL=H)withthedefaulttermination
network. The DC1954A provides pull-down, series and a
differential termination resistor options to accommodate
the other LVPECL termination networks described in the
data sheet.
LVDS/CMOS Output Options
The LVDS/CMOS outputs are DC-coupled and have an on
boarddifferential100Ωresistorterminationbydefault.The
DC1954A provides pull-down, series and a differential ter-
minationresistoroptionstoaccommodatetheotherLVDS/
CMOS termination networks described in the data sheet.
Table 1. DC1954A Assembly Options
ASSEMBLY VERSION
U1 PART NUMBER
OUT0+/–
OUT1+/–
OUT2+/–
DC1954A-A
LTC6954IUFF-1
LVPECL
LVPECL
LVPECL
DC1954A-B
LTC6954IUFF-2
LVPECL
LVPECL
LVDS/CMOS
DC1954A-C
LTC6954IUFF-3
LVPECL
LVDS/CMOS
LVDS/CMOS
DC1954A-D
LTC6954IUFF-4
LVDS/CMOS
LVDS/CMOS
LVDS/CMOS
5. IftheoutputtypeisLVDS,theoutputsmustbeAC-coupled
intosingle-ended,50Ωinputtestequipment.Additionally,
the unconnected output must be AC-coupled into a 50Ω
load to ground to provide a balanced output load. If the
LVCSx bit is low, the signal amplitude at the instrument
will be approximately half of the data sheet value due to
the existing 100Ω termination on the demo board.
6. If the output is CMOS, a 200Ω series resistor must be
included to limit the output current when connecting
to the 50Ω input on test equipment. The signal swing
at the instrument is then approximately 20 percent of
the data sheet value.
Contact the factory for further troubleshooting.
Input Options
The inputs have a 50Ω termination resistor to GND and are
AC-coupled by default. The DC1954A provides pull-down,
pull-up and a differential termination resistor options to
accommodate the other input termination networks de-
scribed in the data sheet.
Clock Follower Input Network
When using the DC1954A as a clock follower, EZSync
requires the LTC6954 inputs to be taken to a low state
while the SYNC pin is high. To meet this requirement, the
DC1954AmustbemodifiedtosupportDC-coupling.Refer
to the EZSync Function section and to the data sheet for
more details on using the LTC6954 as a clock follower.
EZSync Function
Apply a 1ms or greater high pulse to the SYNC SMA con-
nector to take advantage of the EZSync function. Refer
to the LTC6954 data sheet for SYNC timing and level
requirements.
Quick start proceDure
Dc1954a reconfiguration
assembly options



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