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DLP9000 Datasheet(PDF) 39 Page - Texas Instruments

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Part # DLP9000
Description  ype A DMDs
PDF  56 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DLP9000 Datasheet(HTML) 39 Page - Texas Instruments

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Mirror Park Sequence
VSS
RESET_OEZ
VCC / VCCI
EN_BIAS, EN_OFFSET, and EN_RESET are disabled by
DLP Controller software or PWRDNZ signal control
Note 3
EN_BIAS,
EN_OFFSET,
EN_RESET
VCC / VCCI
Power Off
VBIAS, VOFFSET, and VRESET are disabled by
DLP Controller software
VRESET
VRESET
VRESET < Specification
VRESET > Specification
VSS
VRESET
VOFFSET
VSS
VOFFSET
VOFFSET
Note 1
ûV < Specification
ûV < Specification
Note 1
VOFFSET < Specification
VBIAS
VBIAS
VSS
VSS
VBIAS
VBIAS < Specification
Waveforms Not To Scale.
Details Omitted For Clarity.
VSS
VSS
VSS
VSS
VCC / VCCI
VSS
VSS
VCC,
VCCI
VCC / VCCI
VSS
PWRDNZ
VCC
VSS
LVCMOS
Inputs
LVDS
Inputs
VSS
VSS
Note 3
Note 4
Note 4
Note 4
Note 5
VSS
VSS
Note 2
VSS
Note 2
Refer to Recommended Operating Conditions.
Waveforms Not To Scale.
Refer to Recommended Operating Conditions.
DLP9000
www.ti.com
DLPS036A – SEPTEMBER 2014 – REVISED OCTOBER 2015
DMD Power Supply Power-Down Procedure (continued)
Figure 19. DMD Power Supply Sequencing Requirements
1. To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than specified in
Recommended Operating Conditions. OEMs may find that the most reliable way to ensure this is to power
VOFFSET prior to VBIAS during power-up and to remove VBIAS prior to VOFFSET during power-down.
2. During power-up, the LVDS signals are less than the input differential voltage (VID) maximum specified in
Copyright © 2014–2015, Texas Instruments Incorporated
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Product Folder Links: DLP9000



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