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USB3803 Datasheet(PDF) 10 Page - Microchip Technology

Part # USB3803
Description  USB 2.0 High-Speed Hub Controller Optimized
PDF  99 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

USB3803 Datasheet(HTML) 10 Page - Microchip Technology

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USB3803
DS00001691B-page 10
 2014-2015 Microchip Technology Inc.
3.3
Pin Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface.
The terms assertion and negation are used. This is done to avoid confusion when working with a mixture of “active low”
and “active high” signal. The term “assert”, or “assertion” indicates that a signal is active, independent of whether that
level is represented by a high or low voltage. The term “negate”, or “negation” indicates that a signal is inactive.
3.3.1
PIN DEFINITION
TABLE 3-1:
PIN DESCRIPTIONS
Name
Symbol
Type
Description
Upstream USB 2.0 / Bypass Interface
USB Bus Data
USBUP_DP
USBUP_DM
A-I/O
These pins connect to the upstream USB bus data
signals (Host port, or upstream hub)
Bypass Select for Analog
Switch
BYPASS_N
I
Control signal to select between Hub Mode and
Bypass Mode. When asserted low, the device transi-
tions to Bypass Mode, connects the Bypass Port to
the upstream USB Port, places Port 1 and Port 2 in
high impedance state, and places the core logic in a
reduced power state. When negated high, the device
transitions to HUB MODE and enables operation as a
USB hub.
Note:
Bypass mode is only available in the
USB3803C. For the USB3803B, this pin
must always be driven high.
Downstream USB 2.0 / Bypass Interface
High-Speed USB Data
&
Port Disable Strap Option
USBDN_DP[2:1]
&
USBDN_DM[2:1]
A-I/O
These pins connect to the downstream USB periph-
eral devices attached to the hub’s ports
Downstream Port Disable Strap option:
This pin will be sampled at RESET_N negation to
determine if the port is disabled.
Both USB data pins for the corresponding port must
be tied to VDD33_BYP to disable the associated
downstream port.



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