ADS42B49 datasheet(39/65 Pages) TI1

39 / 65 page

ADS42B49

www.ti.com

SBAS558C – DECEMBER 2012 – REVISED DECEMBER 2015

HP[2]

HP[1]

Bits 7-3

Always write 0

Bits 2-1

HP[2:1]

Set bits HP[11:1] for best performance.

00 = Default after reset

11 = HP[2:1] are enabled

Bit 0

Always write 0

CH A GAIN

CH A TEST PATTERNS

Bits 7-4

CH A GAIN: Channel A gain programmability

These bits set the gain programmability in 0.5-dB steps for channel A.

0000 = 0-dB gain (default after reset)

0001 = 0.5-dB gain

0010 = 1-dB gain

0011 = 1.5-dB gain

0100 = 2-dB gain

0101 = 2.5-dB gain

0110 = 3-dB gain

0111 = 3.5-dB gain

1000 = 4-dB gain

1001 = 4.5-dB gain

1010 = 5-dB gain

1011 = 5.5-dB gain

1100 = 6-dB gain

Bit 3

Always write 0

Bits 2-0

CH A TEST PATTERNS: Channel A data capture

These bits verify data capture for channel A.

000 = Normal operation

001 = Outputs all 0s

010 = Outputs all 1s

011 = Outputs toggle pattern.

The output data D[13:0] are an alternating sequence of 10101010101010 and 01010101010101.

100 = Outputs digital ramp.

101 = Outputs custom pattern; use registers 3Fh and 40h to set the custom pattern

110 = Unused

111 = Unused

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