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MEC1322 Datasheet(PDF) 328 Page - Microchip Technology |
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MEC1322 Datasheet(HTML) 328 Page - Microchip Technology |
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328 / 456 page ![]() MEC1322 DS00001719D-page 328 2014 - 2015 Microchip Technology Inc. 28.3 Signal Description 28.4 Host Interface The blinking/breathing PWM block is accessed by a controller over the standard register interface. 28.5 Power, Clocks and Reset This section defines the Power, Clock, and Reset parameters of the block. 28.5.1 POWER DOMAINS 28.5.2 CLOCK INPUTS 28.5.3 RESETS 28.6 Interrupts Each PWM can generate an interrupt. The interrupt is asserted for one 48 MHz clock period whenever the PWM WDT times out. The PWM WDT is described in Section 28.8.3.1, "PWM WDT," on page 332. TABLE 28-1: SIGNAL DESCRIPTION Name Direction Description PWM Output Output Output of PWM By default, the PWM pin is configured to be active high: when the PWM is configured to be fully on, the pin is driving high. When the PWM is configured to be fully off, the pin is low. If firmware requires the Blinking/Breathing PWM to be active low, the Polarity bit in the GPIO Pin Control Register associated with the PWM can be set to 1, which inverts the output polarity. TABLE 28-2: POWER SOURCES Name Description VCC1 Main power. The source of main power for the device is system dependent. TABLE 28-3: CLOCK INPUTS Name Description 32KHz_Clk 32.768 KHz clock 48 MHz Ring Oscillator 48 MHz clock TABLE 28-4: RESET SIGNALS Name Description VCC1_RESET Block reset Note: PWM_WDT[0], PWM_WDT[1], PWM_WDT[2], PWM_WDT[3] bits in the GIRQ17 and GIRQ18 registers are the interrupt source bits for the three instances of the Blinking/Breathing PWM in the MEC1322. TABLE 28-5: EC INTERRUPTS Source Description PWM_WDT PWM watchdog time out |
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