MEC1322 datasheet(324/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 324

 2014 - 2015 Microchip Technology Inc.

27.12.4

SPI TX_DATA REGISTER

27.12.5

SPI RX_DATA REGISTER

Offset

00h

Bits

Description

Type

Default

Reset

Event

31:8 Reserved

7:0 TX_DATA

A write to this register when the Tx_Data buffer is empty (TXBE in

the SPI Status Register is ‘1’) initiates a SPI transaction. The byte

written to this register will be loaded into the shift register and the

TXBE flag will be asserted. This indicates that the next byte can be

written into the TX_DATA register. This byte will remain in the TX_-

DATA register until the SPI core has finished shifting out the previ-

ous byte. Once the shift register is empty, the hardware will load the

pending byte into the shift register and once again assert the TxBE

bit.

The TX_DATA register must not be written when the TXBE bit is

zero. Writing this register may overwrite the transmit data before it is

loaded into the shift register.

R/W

VCC1_R

ESET

Offset

00h

Bits

Description

Type

Default

Reset

Event

31:8 Reserved

7:0 RX_DATA

This register is used to read the value returned by the external SPI

device. At the end of a byte transfer the RX_DATA register contains

serial input data (valid or not) from the last transaction and the RXBF

bit is set to one. This status bit indicates that the RX_DATA register

has been loaded with a the serial input data. The RX_DATA register

should not be read before the RXBF bit is set.

The RX_DATA register must be read, clearing the RXBF status bit

before writing the TX_DATA register. The data in the receive shift

cleared. If a data byte is pending in the receive shift register the

value will be loaded immediately into the RX_DATA register and the

RXBF status flag will be asserted. Software should read the RX_-

DATA register twice before starting a new transaction to make sure

the RX_DATA buffer and shift register are both empty.

R/W

VCC1_R

ESET

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