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L9663 Datasheet(PDF) 54 Page - STMicroelectronics |
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L9663 Datasheet(HTML) 54 Page - STMicroelectronics |
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54 / 104 page ![]() Communication interface L9663 54/104 DocID028693 Rev 1 SR3 Status Register 3 Address: 000110 Type: R (except if otherwise specified) Description: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Default value: ---------------- R [15] STS_EN: Enable self test status 0: disabled: STS/STSR register not WR (depending on PROG state STS will not be enabled) 1: enabled: STS/STSR register WR [14] INITDATA_RDY: Initialization data ready 0: not ready 1: ready [13] VAS_ON: VAS regulator status 0: disabled 1: enabled [12] FIFO_LCK: FIFO locked status Note: This bit is set to '1' when first data is read after FIFO has been filled up Cleared to '0' as soon as FIFO gets emptied [11:10] RESERVED [9] SYNC2_STAT: SYNC2 pin status 0: SYNC2 pin is low 1: SYNC2 pin is high for more than pin filter time. It can be used to detect short condition on this pin. Cleared upon read. [8] UDB2_BUSY: Upstream data buffer 2 is busy with data to be sent Not cleared upon read 0: not busy 1: busy [7] PSI2_ON: PSI 2 interface status 0: disabled 1: enabled [6] RESERVED |
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