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DP83867CS Datasheet(PDF) 105 Page - Texas Instruments |
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DP83867CS Datasheet(HTML) 105 Page - Texas Instruments |
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105 / 114 page ![]() 4-Layer 6-Layer 8-Layer xxx xxx xxx Ground High-speed signal VDD supply Legend xx xx xxx xxx DP83867CS, DP83867IS, DP83867E www.ti.com SNLS504 – OCTOBER 2015 Return path (continued) Figure 29. Differential Signal Pair-Plane Crossing 12.3 Transformer Layout There should be no metal layer running beneath the transformer. Transformers can inject noise in metal beneath them which can affect the performance of the system. 12.4 Metal Pour All metal pours which are not signals or power should be tied to ground. There should be no floating metal on the system. There should be no metal between the differential traces. 12.5 PCB Layer Stacking To meet signal integrity and performance requirements, at minimum a four-layer PCB should be used. However a 6 layer board is recommended. See Figure 30 for the recommended layer stack ups for 4, 6 and 8-layer boards. These are recommendations not requirements, other configurations can be used as per system requirements. Figure 30. Recommended Layer Stack Up Within a PCB, it may be desirable to run traces using different methods, microstrip vs. stripline, depending on the location of the signal on the PCB. For example, it may be desirable to change layer stacking where an isolated chassis ground plane is used. Figure 31 illustrates alternative PCB stacking options. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 105 |
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