9

ICS1524

ICS1524 Rev C 01/31/2003

Name:

DPA Control Register

Register:

5h

Index:

Read / Write*

Bit Name

Bit # Reset Value

Description

DPA_Res 0-1

0 - 1

3

Dynamic Phase Adjust Resolution Select.

Metal_Rev

2- 7

0

Metal Mask Revision Number.

Bit

Name

Description

0-1

DPA_Res 0 -1

Dynamic Phase Adjust (DPA) Resolution Select.

It is not recommended to use the DPA above 160 MHz.

2-7

Metal_Rev

Metal Mask Revision Number.

After power-up, register bits 7:2 must be written with 111111. After this write,

a read indicates the metal mask revision, as below.

See register 8h for details.

Bit 1

Bit 0

Delay Elements

0

0

16

48

160

0

1

32

24

80

10

Reserved

1

1

64

12

40

CLK Range, MHz

n

o

i

s

i

v

e

R7

t

i

B6

t

i

B5

t

i

B4

t

i

B3

t

i

B2

t

i

B

A

11111

1

B

0

1111

1

1

C

1

0

111

1

2

C

0

0

111

1

D1

1

0

1

1

1

E

111

0

1

1

F

1111

0

1

G

11111

0