OBSOLETE

FPD87352

SNOSAG3C – JULY 2004 – REVISED APRIL 2013

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LUT REGISTER

This block provides the RTC reference values to be processed on the RTC Data Processor Block. The setting of

RTC reference values is provided by the external EEPROM in normal condition. If the external EEPROM is not

present it will use the internal ROM's RTC reference values. The RTC reference values are the new gray values

depending on the difference between the current frames' RGB gray data and the previous frame's RGB gray data

of same pixel.

RTC DATA PROCESSOR

This function generates new gray values depending on the difference of the current RGB gray data and same

pixel of the previous frame. The reference values fetch from the LUT (Look Up Table) values in the LUT

Register.

RSDS INTERFACE WITH SKEW CONTROL

This functional block transforms CMOS level signal to RSDS for the system clock (DCLK) and RGB color data.

The

RSDS

skew

is

controlled

by

RSKEW[2:0]

with

delay

steps

between

the

RSF/BCKP/N

and

RSF/BR/G/B[3:0]P/N which is implemented in CLK & Data synchronizer.

VERTICAL & HORIZONTAL LCD TIMING CONTROL

This function block generates the TTL(CMOS) level signal for the interface of column drivers and row drivers in

the LCD system. All signals are synchronized by RSF/BCKP/N which is RSDS data clock for the column drivers.

The clock skew control must not change the typical timing of TTL(CMOS) level signals.

4

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