OBSOLETE

FPD87352

www.ti.com

SNOSAG3C – JULY 2004 – REVISED APRIL 2013

FPD87352CXA +3.3V TFT-LCD Timing Controller with Single LVDS

Input/Dual RSDS™ Outputs Including RTC (Response

Time Compensation) for TFT-LCD Monitors and TV

(XGA/WXGA/HDTV I,II,-)

Check for Samples: FPD87352

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FEATURES

DESCRIPTION

The FPD87352CXA is an integrated FPD-Link™ +

23

•

Input Frequency Range from 30 MHz to 95 MHz

RSDS + TFT-LCD Timing Controller. The logic

•

Support Display Resolutions XGA (1024x768),

architecture is implemented using standard and

WXGA (1280x768), HDTV I (1280x768), HDTV II

default timing controller functionality based on an

(1366x768) and HDTV - (1280x800)

Embedded Gate Array. The device is reconfigurable

to the needs of a specific application by providing

•

Embedded Gate Array for Custom Panel

user-defined specifications or customer supplied

Timing

VHDL/Verilog code.

•

LVDS Single Pixel Input (8-Bit/6-Bit) Interface

(FPD-Link)

The FPD87352CXA is an ideal Timing Controller for

LCD TV Applications. It has a unique feature, RTC

•

RSDS Dual Bus Output (8-Bit/6-Bit)

that will improve the intra-gray level response time of

•

Drives RSDS Column Drivers up to 47.5 MHz

a LCD TV panel. Improving the intra-gray level

Clock

response time of the LCD panel will result in a

dramatically improved Motion Picture Image Quality

•

Flexible RSDS Data Output Mapping for

of video content that are displayed on the LCD panel.

Bottom or Top Mount

The RTC feature is accomplished through application

•

RTC (Response Time Compensation) Function

of a Boost or Overdrive Voltage that will force the LC

•

2 Wired Serial EEPROM Interface Support

material to respond more rapidly. This Boost or

(RTC LUT)

Overdrive is accomplished through combination of an

internal or external EEPROM LUT (Look Up Table),

•

Interface with External Frame Memory

which

contains

the

boost/overdrive

levels,

and

•

Virtual 8-Bit Color Depth in FRC/Dithering

external memory that acts as a Frame Buffer.

Mode

The

FPD87352CXA

is

a

timing

controller

that

•

Supports Graphics Controllers with Spread

combines an LVDS single pixel input interface with

Spectrum Interface for Lower EMI

National's

Reduced

Swing

Differential

Signaling

•

Supports External Spread Spectrum (SSCG)

(RSDS)

output

column

driver

interface

for

•

DE Only Mode

XGA/WXGA/HDTV I,II,- resolutions. It resides on the

Flat Panel Display and provides the data buffering

•

CMOS Circuitry Operates from 3.0V–3.6V;

and control signal generation. FPD-Link, a lower

0°C–70°C

dynamic

power,

low

EMI

(Electro

Magnetic

•

176 LQFP Package with Body Size 24 mm x 24

Interference) interface is used between this timing

mm x 1.4 mm, 0.5 mm Pitch

controller and the host system. A RSDS interface is

used between the timing controller and the column

drivers.

The dual 13/10 pair differential bus conveys up to 24-

bit color data for XGA, WXGA and HDTV panels.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

RSDS is a trademark of Texas Instruments.

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All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Copyright © 2004–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.