LXT972ALC datasheet(49/70 Pages) INTEL

49 / 70 page

3.3V Dual-Speed Fast Ethernet Transceiver Datasheet — LXT972A

Datasheet

Figure 26. 10BASE-T Receive Timing

Table 27. 10BASE-T Receive Timing Parameters

Parameter

Sym

Min

Typ

Max

Units2

Test Conditions

RXD, RX_DV, RX_ER Setup to RX_CLK High

––

–

RXD, RX_DV, RX_ER Hold from RX_CLK High

––

–

TPIP/N in to RXD out (Rx latency)

5.8

–

6.0

–

CRS asserted to RXD, RX_DV, RX_ER

asserted

–

RXD, RX_DV, RX_ER de-asserted to CRS de-

asserted

0.3

–

0.5

–

TPI in to CRS asserted

–

TPI quiet to CRS de-asserted

–

TPI in to COL asserted

–

TPI quiet to COL de-asserted

–

1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.

2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate. 10BASE-T bit time = 10-

7 s or 100 ns.

RX_CLK

RXD,

RX_DV,

RX_ER

CRS

TPI

COL

LXT972ALC Datasheet(PDF) 49 Page - Intel Corporation

LXT972ALC Datasheet(HTML) 49 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

Datasheet Download

Link URL