SP6650 datasheet(6/17 Pages) SIPEX

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Date: 5/25/04

SP6650 High Efficiency 600mA Synchronous Buck Regulator

RDS(ON) of the P-Channel MOSFET and RL is

the DC resistance of the inductor.

The on-time control circuit seamlessly operates

the converter between CCM, DCM, and low

dropout modes without the need for compensa-

tion. The converter's transient response is quick

since there is no compensated error amplifier in

the loop.

Inductor Over-Current Protection

The inductor over-current protection circuitry is

programmed to limit the peak inductor current

to 950mA (pin 4 tied to VIN) or 500mA (pin 4 to

ground). This is done during the on-time by

comparing the source to drain voltage drop of

the PMOS passing the inductor current with a

second voltage drop representing the maximum

allowable inductor current. As the two voltages

become equal, the over-current comparator trig-

gers a minimum off-time one shot. The off-time

one shot forces the loop into the discharge phase

for a minimum time causing the inductor current

to decrease.

At the end of the off-time loop, control is handed

back to the OR'd on-time signal. If the output

voltage is still low, charging begins until the

output is in regulation or the current limit has

been reached again. During startup and over-

load conditions, the converter behaves like a

current source at the programmed limit minus

half the current ripple. The minimum TOFF is

µs (typ.) at VOUT = 0V and 2µs (typ.) for VOUT

greater than 1.5V.

Under-Voltage Lockout

The SP6650 is equipped with under-voltage

lockout to protect the input battery source from

excessive currents when substantially dis-

charged. When the input supply is below the

UVLO threshold both power switches are open

to prevent inductor current from flowing. The

internal reference and regulator circuitry are

enabled drawing the 70

µA light load quiescent

current on pin 2. The rising input voltage UVLO

threshold is +2.7V, with a typical hysteresis of

120mV to prevent chattering due to the imped-

ance of the input source.

On-Time Control: continued

The maximum loop frequency in CCM is de-

fined by the equation:

FLP ≈

(VIN-VOUT)*(VOUT+IOUT*Rdc)

KON*[V

IN+IOUT*(Rdc-Rch)]

where:

FLP = CCM loop frequency

Rdc = NMOS on resistance, 0.3

Ωtyp.

Ignoring conduction losses simplifies the loop

frequency to

FLP =

VOUT

* (VIN-VOUT)

KON

VIN

OR'ing the loop comparator and the on-time one

shot reduces the switching frequency for load

currents below half the inductor ripple current.

This increases light load efficiency. The mini-

mum on-time insures that the inductor current

ripple is a minimum of KON/L, more than the

load current demands. The converter goes in to

a standard pulse frequency modulation (PFM)

mode where the switching frequency is propor-

tional to the load current.

Low Dropout and Load Transient

Operation

OR'ing the loop comparator also increases the

duty ratio past the ideal D=VOUT/VIN up to and

including 100%. Under a light to heavy load

transient, the loop comparator will hold the

main switch on past the on-time one shot pulse

until the output is brought back into regulation.

Also, as the input voltage supply drops down

close to the output voltage, the main MOSFET

resistance loss will dictate a much higher duty

ratio to regulate the output. Eventually as the

input voltage drops low enough, the output

voltage will follow, causing the loop compara-

tor to hold the converter at 100% duty cycle.

This mode is critical in extending battery life

when the output voltage is at or above the

minimum usable input voltage. The dropout

voltage is the minimum (VIN - VOUT) below

which the output regulation cannot be main-

tained. The dropout voltage of SP6650 is equal

to IL (0.4Ω + RL) where 0.4Ω is the typical

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