(m a n)

(mi x)

trip(m a n)

LBI(m a n)

(mi x)

R1

R2

V

V

R2

+

=

´

(min)

(max)

trip(min)

LBI(min)

(max)

R1

R2

V

V

R2

+

=

´

R1 1 M

R2

=

W -

LBI

BAT

V

R2 1 M

V

=

W ´

VO

_

+

+

−

VREF

VBAT

R2

R1

LBI

IN

LBO

R3

(TRIP)

R1

V

1.21 V

1

R2

æ

ö

=

´

+

ç

÷

è

ø

TPS60140, TPS60141

www.ti.com

SLVS273A – FEBRUARY 2000 – REVISED NOVEMBER 2015

Feature Description (continued)

Figure 5. Programming of the Low-Battery Comparator Trip Voltage

A 100-nF ceramic capacitor should be connected in parallel to R2 if large line transients are expected. These

voltage drops can inadvertently trigger the low-battery comparator and produce a wrong low-battery warning

signal at the LBO pin.

(1)

(2)

Formulas to calculate the minimum and maximum trip voltage:

(3)

(4)

Table 1. Recommended Values for the Resistive Divider From the E96 Series

(±1%)

R1/k

Ω

R2/k

Ω

1.8

357

732

1.700

1.902

1.9

365

634

1.799

2.016

2

412

634

1.883

2.112

2.1

432

590

1.975

2.219

2.2

442

536

2.08

2.338

9.3.3 Power-Good Detector (TPS60141)

The power-good (PG) terminal is an open-drain output that is pulled low when the output is out of regulation.

When the output rises to typically 90% of its nominal voltage, the power-good output is released. Power-good is

high impedance in shutdown. In normal operation an external pullup resistor must be connected between PG and

OUT. The resistor should be in the 100-k

Ω to 1-MΩ range. If the power-good function is not used, the PG

terminal should remain unconnected.

Copyright © 2000–2015, Texas Instruments Incorporated

Submit Documentation Feedback

9

Product Folder Links: TPS60140 TPS60141