TLC59581, TLC59582

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SLVSCZ9A – OCTOBER 2015 – REVISED NOVEMBER 2015

Recommended Operating Conditions (continued)

MIN

NOM

MAX

UNIT

Data shift clock frequency

SCLK

25

MHz

Grayscale control clock frequency

GCLK

33

MHz

SCLK

10

SCLK

10

Pulse duration

ns

GCLK

15

GCLK

10

SIN - SCLK

↑

2

LAT

↑ - SCLK↑

3

LAT

↓ - SCLK↑

5

ns

LAT

↓ - SCLK↑, for READSID,

50

READFC1, and READFC2

Setup time

LAT

↓ (Vsync command) - GCLK↑

2500

The last LAT

↓ for no all ‘0’ data latching

to resume normal mode – GCLK

↑,

50

µS

PSAVE_ENA bit = ‘1b’

The last GCLK

↑ - the 1st GCLK↑ of next

20

ns

line

SCLK

↑ - SIN

2

Hold time

SCLK

↑ - LAT↑

2

ns

SCLK

↑ - LAT↓

13

(1)

Specified by design

7.4 Thermal Information

TLC59581/82

RTQ (VQFN)

UNIT

56 PINS

Junction-to-ambient thermal resistance

27.4

°C/W

Junction-to-case (top) thermal resistance

13.6

°C/W

Junction-to-board thermal resistance

5.5

°C/W

Junction-to-top characterization parameter

0.2

°C/W

Junction-to-board characterization parameter

5.5

°C/W

Junction-to-case (bottom) thermal resistance

0.8

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

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TLC59582