AD7768BSTZ datasheet(58/99 Pages) AD

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AD7768/AD7768-4

Data Sheet

Rev. A | Page 58 of 99

DECIMATION RATE CONTROL

The AD7768/AD7768-4 have programmable decimation rates

for the digital filters. The decimation rates allow the user to reduce

the measurement bandwidth, reducing the speed but increasing the

resolution. When using the SPI control, control the decimation

rate on the AD7768/AD7768-4 through the channel mode regis-

ters. These registers set two separate channel modes with a given

decimation rate and filter type. Each ADC is mapped to one of

these modes via the channel mode select register. Table 28 details

both the decimation rates available, and the filter types for selection,

within Mode A and Mode B.

In pin control mode, the decimation ratio is controlled by the

DEC0 and DEC1 pins; see Table 17 for decimation configuration in

pin control mode.

Table 28. Channel x Mode Registers, Register 0x01 and

Bits

Name

Logic Value

Decimation Rate

FILTER_TYPE_x

Wideband filter

Sinc5 filter

[2:0]

DEC_RATE_x

000

001

010

128

011

256

100

512

101

1024

110

1024

111

1024

ANTIALIASING

Because the AD7768/AD7768-4 are switched capacitor, discrete

time ADCs, the user may wish to employ external analog antialias-

ing filters to protect against fold back of out of band tones.

Within this section, an out of band tone refers to an input fre-

quency greater than the pass band frequency specification of

the digital filter that is applied at the analog input.

When designing an antialiasing filter for the AD7768/AD7768-4,

three main aliasing regions must be taken into account. After

the alias requirements of each zone are understood, the user can

design an antialiasing filter to meet the needs of the specific

application. The three zones for consideration are related to the

modulator sampling frequency, the modulator chopping fre-

quency, and the modulator saturation point.

Modulator Sampling Frequency

The AD7768/AD7768-4 modulator signal transfer function

includes a notch, at odd multiples of fMOD, to reject tones or

harmonics related to the modulator clock. The modulator itself

attenuate signals at frequencies of fMOD, 3 × fMOD., 5 × fMOD, and

so on. For an MCLK frequency of 32.768 MHz, the attenuation

is approximately 35 dB in fast mode, 41 dB in median mode,

and 53 dB in eco mode. Attenuation is increased by 6 dB across

each power mode, with every halving of the MCLK frequency,

for example, when reducing the clock from 32.768 MHz to

16.384 MHz.

The modulator has no rejection to signals that are at frequencies in

zones around 2 × fMOD and all even multiples of fMOD.. Signals at

these frequencies are aliased by the AD7768/AD7768-4. For the

AD7768/AD7768-4, the first of these zones that requires protec-

tion is at 2 × fMOD. Because typical switch capacitor, discrete

time Σ-Δ modulators provide no protection to aliasing at the

frequency, fMOD, the AD7768/AD7768-4 provide a distinct

advantage in this regard.

Figure 91 shows the frequency response of the modulator and

wideband digital filter to out of band tones at the analog input.

Figure 91 shows the magnitude of an alias that is seen in band

vs. the frequency of the signal sampled at the analog input. The

relationship between the input signal and the modulator frequency

is expressed in a normalized manner as a ratio of the input signal

(fIN) to the modulator frequency (fMOD). This data demonstrates the

ADC frequency response relative to out of band tones when using

the wideband filter. The input frequency (fIN) is swept from dc to

20 MHz. In fast mode, using an 8.192MHz fMOD frequency, the

x-axis spans ratios of fIN/fMOD from 0 to 2.44 (equivalent to fIN of

0 Hz to 20 MHz). A similar characteristic occurs in median and

eco modes.

The notch appears in Figure 91 with the input frequency (fIN) at

fMOD (designated at fIN/fMOD = 1.00 on the x-axis). An input at this

frequency is attenuated by 35 dB, which adds to the attenuation of

any external antialiasing filter, thus reducing the frequency roll-

off requirement of the external filter. If the plot is swept further

in frequency, the notch is seen to recur at fIN/fMOD = 3.00.

The point where fIN = 2 × fMOD (designated on the x-axis at 2.00)

offers 0 dB attenuation, indicating that all signals falling at this

frequency alias directly back into the ADC conversion results,

in accordance with sampling theory.

The AD7768/AD7768-4 wideband digital filter also offers an

added protection against aliasing. Because the wideband filter has

full attenuation at the Nyquist frequency (fODR/2, where fODR =

fMOD/Decimation Rate), input frequencies, and in particular

harmonics of input frequencies, that may fall close to fODR/2, do not

fold back into the pass-band of the AD7768/AD7768-4.

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