ADuM3154

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

MCLK

3

MO

4

20

19

18

17

MI

5

MSS

6

SSA0

7

16

15

14

SSA1

8

13

NIC

NOTES

1. NIC = NOT INTERNALLY CONNECTED.

THIS PIN IS NOT INTERNALLY

CONNECTED AND SERVES NO

FUNCTION IN THE ADuM3154.

9

12

SCLK

SI

SO

SS0

SS1

SS2

SS3

10

11

ADuM3154

(Not to Scale)

TOP VIEW

Figure 3. Pin Configuration

Table 17. Pin Function Descriptions

Pin No.

Mnemonic Direction Description

1

Power

2, 10

Return

Ground 1. Ground reference for Isolator Side 1.

3

MCLK

Input

SPI Clock from the Master Controller.

4

MO

Input

SPI Data from the Master to the Slave MO/SI Line.

5

MI

Output

SPI Data from the Slave to the Master MI/SO Line.

6

MSS

Input

Slave Select from the Master. This signal uses an active low logic. The slave select pin can require as

much as a 10 ns setup time from the next clock or data edge depending on the speed grade.

7

SSA0

Input

Multiplexer Selection Input, Low Order Bit.

8

SSA1

Input

Multiplexer Selection Input, High Order Bit.

9

NIC

Not Internally Connected. This pin is not internally connected and serves no function in the ADuM3154.

11, 19

Return

Ground 2. Ground reference for Isolator Side 2.

12

SS3

Output

Routed Slave Select Signal. High-Z when SS3 is not selected.

13

SS2

Output

Routed Slave Select Signal. High-Z when SS2 is not selected.

14

SS1

Output

Routed Slave Select Signal. High-Z when SS1 is not selected.

15

SS0

Output

Routed Slave Select Signal. High-Z when SS0 is not selected.

16

SO

Input

SPI Data from the Slave to the Master MI/SO Line.

17

SI

Output

SPI Data from the Master to the Slave MO/SI Line.

18

SCLK

Output

SPI Clock from the Master Controller.

20

Power

Rev. A | Page 14 of 22