ADAV4601 datasheet(56/60 Pages) AD

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ADAV4601

Rev. B | Page 56 of 60

Address 0x008A SRC Configuration 3 Register (Default: 0x0032)

Table 57.

Bit No.

Bit Name

Description

Default

Bits[15:7]

Reserved

Always write as 0 if writing to this register.

000000000

Bit[6]

SRC2 Channel C enable

Used to enable Channel C of SRC2.

0b = disabled

1b = enabled

Bits[5:4]

SRC2 Channel C input select

Used to select the serial data input for SRC2 Channel C.

00b = SDIN0

01b = SDIN1

10b = SDIN2

11b = SDIN3

Bit[3]

Reserved

Always write as 0 if writing to this register.

Bit[2]

SRC2C Channel B enable

Used to enable Channel B of SRC2.

0b = disabled

1b = enabled

Bits[1:0]

SRC2C Channel B input select

Used to select the serial data input for SRC2 Channel B.

00b = SDIN0

01b = SDIN1

10b = SDIN2

11b = SDIN3

Address 0x008E SPDIF Transmitter Control 2 Register (Default: 0x002D)

Table 58.

Bit No.

Bit Name

Description

Default

Bits[15:8]

Reserved

Always write as 0 if writing to this register.

00000000

Bits[7:4]

Channel status sampling frequency

Used to set the channel status sampling rate in the SPDIF transmitted

stream; should not change the sample rate but only the status bits.

0010

0x0 = 44.1 kHz

0x2 = 48 kHz

0x3 = 32 kHz

Bit[3]

SPDIF TX word length field size

Selects the maximum SPDIF transmitter word length.

0b = 20 bits maximum

1b = 24 bits maximum

Bits[2:0]

Transmitter word length

Used to select how many of the bits set by Bit[3] carry valid data.

If 24-bit maximum

101

0x5 = 24 bits

0x4 = 23 bits

0x2 = 22 bits

0x6 = 21 bits

0x1 = 20 bits

If 20-bit maximum

0x5 = 20 bits

0x4 = 19 bits

0x2 = 18 bits

0x6 = 17 bits

0x1 = 16 bits

ADAV4601 Datasheet(PDF) 56 Page - Analog Devices

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