ADAV4601BSTZ datasheet(5/60 Pages) AD

5 / 60 page

ADAV4601

Rev. B | Page 5 of 60

SPECIFICATIONS

AVDD = 3.3 V, DVDD = 1.8 V, ODVDD = 3.3 V, operating temperature = −40°C to +85°C, master clock 24.576 MHz, measurement

bandwidth = 20 Hz to 20 kHz, ADC input signal = DAC output signal = 1 kHz, unless otherwise noted.

PERFORMANCE PARAMETERS

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

REFERENCE SECTION

Absolute Voltage VREF

1.53

VREF Temperature Coefficient

100

ppm/°C

ADC SECTION

Number of Channels

One stereo channel

Full-Scale Input Level

100

μA rms

Resolution

Bits

Dynamic Range (Stereo Channel)

A-Weighted

−60 dBFS with respect to full-scale analog input

Total Harmonic Distortion + Noise

(Stereo Channel)

−90

−3 dBFS with respect to full-scale analog input

Gain Mismatch

0.2

Left- and right-channel gain mismatch

Crosstalk (Left-to-Right, Right-to-Left)

−110

Gain Error

−1

Input signal is 100 μA rms

Current Setting Resistor (RISET)

kΩ

External resistor to set current input range of ADC

for nominal 2.0 V rms input signal

Power Supply Rejection

−87

1 kHz, 300 mV p-p signal at AVDD

ADC DIGITAL DECIMATOR FILTER

CHARACTERISTICS

At 48 kHz, guaranteed by design

Pass Band

22.5

kHz

Pass-Band Ripple

±0.0002

Stop Band

26.5

kHz

Stop-Band Attenuation

100

Group Delay

1040

μs

PWM SECTION

Frequency

384

kHz

Guaranteed by design

Modulation Index

0.976

Guaranteed by design

Dynamic Range

A-Weighted

−60 dBFS with respect to full-scale code input

Total Harmonic Distortion + Noise

−80

−3 dBFS with respect to full-scale code input

DAC SECTION

Number of Auxiliary Output Channels

Three stereo channels

Resolution

Bits

Full-Scale Analog Output

V rms

Dynamic Range

A-Weighted

−60 dBFS with respect to full-scale code input

Total Harmonic Distortion + Noise

−86

−3 dBFS with respect to full-scale code input

Crosstalk (Left-to-Right, Right-to-Left)

−102

Interchannel Gain Mismatch

0.1

Left- and right-channel gain mismatch

Gain Error

0.525

1 V rms output

DC Bias

1.53

Power Supply Rejection

−90

1 kHz, 300 mV p-p signal at AVDD

Output Impedance

235

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