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COP888EB Datasheet(PDF) 46 Page - National Semiconductor (TI) |
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COP888EB Datasheet(HTML) 46 Page - National Semiconductor (TI) |
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46 / 75 page ![]() MICROWIRE/PLUS (Continued) MICROWIRE/PLUS Master Mode Operation In the MICROWIRE/PLUS Master mode of operation the shift clock (SK) is generated internally. The MICROWIRE Master always initiates all data exchanges. The MSEL bit in the CNTRL register must be set to enable the SO and SK functions onto the G Port. The SO and SK pins must also be selected as outputs by setting appropriate bits in the Port G configuraiton register. Table 12 summarizes the bit settings required for Master or Slave mode of operation. TABLE 11. MICROWIRE/PLUS Master Mode Clock Selection SL1 SL0 SK 0 0 2Xt c 0 1 4Xt c 1 x 8Xt c Where t c is the instruction cycle clock MICROWIRE/PLUS Slave Mode Operation In the MICROWIRE/PLUS Slave mode of operation the SK clock is generated by an external source. Setting the MSEL bit in the CNTRL register enables the SO and SK functions onto the G Port. The SK pin must be selected as an input and the SO pin is selected as an output pin by setting and re- setting the appropriate bit in the Port G configuration regis- ter. Table 3 summarizes the settings required to enter the Slave mode of operation. The user must set the BUSY flag immediately upon entering the Salve mode. This will ensure that all data bits sent by the Master will be shifted properly. After eight clock pulses the BUSY flag will be cleared and the sequence may be re- peated. Alternate SK Phase Operation The device allows either the normal SK clock or an alternate phase SK clock to shift data in and out of the SIO register. In both the modes the SK is normally low. In the normal mode data is shifted in on the rising edge of the SK clock and the data is shifted out on the falling edge of the SK clock. The SIO register is shifted on each falling edge of the SK clock in the normal mode. In the alternate SK phase mode the SIO register is shifted on the rising edge of the SK clock. A control flag, SKSEL, allows either the normal SK clock or the alternate SK clock to be selected. Resetting SKSEL causes the MICROWIRE/PLUS logic to be clocked from the normal SK signal. Setting the SKSEL flag selects the alter- nate SK clock. The SKSEL is mapped into the G6 configura- tion bit. The SKSEL flag will power up in the reset condition, selecting the normal SK signal. TABLE 12. MICROWIRE/PLUS Mode Selection This table assumes that the control flag MSEL is set. G4 G5 G4 Fun. G5 Fun. Operation (SO) (SK) Config. Config. Bit Bit 1 1 SO Int. SK MICROWIRE/ PLUS Master 0 1 TRI-STATE Int. SK MICROWIRE/ PLUS Master 1 0 SO Ext. SK MICROWIRE/ PLUS Slave 0 0 TRI-STATE Ext. SK MICROWIRE/ PLUS Slave DS012837-37 FIGURE 35. MICROWIRE/PLUS Application www.national.com 46 |
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