COP888EB datasheet(54/75 Pages) NSC

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A/D Converter (Continued)

OPERATING MODES

The A/D converter supports ratiometric measurements. It

supports both Single Ended and Differential modes of opera-

tion.

Four specific analog channel selection modes are sup-

ported. These are as follows:

Allow any specific channel to be selected at one time. The

A/D converter performs the specific conversion requested

and stops.

Allow any specific channel to be scanned continuously. In

other words, the user specifies the channel and the A/D con-

verter scans it continuously. At any arbitrary time the user

can immediately read the result of the last conversion. The

user must wait for only the first conversion to complete.

Allow any differential channel pair to be selected at one time.

The A/D converter performs the specific differential conver-

sion requested and stops.

Allow any differential channel pair to be scanned continu-

ously. In other words, the user specifies the differential chan-

nel pair and the A/D converter scans it continuously. At any

arbitrary time the user can immediately read the result of the

last differential conversion. The user must wait for only the

first conversion to complete.

The A/D converter is supported by two memory mapped reg-

isters, the result register and the mode control register.

When the device is reset, the mode control register (ENAD)

is cleared, the A/D is powered down and the A/D result reg-

ister has unknown data.

A/D Control Register

The ENAD control register contains 3 bits for channel selec-

tion, 2 bits for prescaler selection, 2 bits for mode selection

and a Busy bit. An A/D conversion is initiated by setting the

ADBSY bit in the ENAD control register. The result of the

conversion is available to the user in the A/D result register,

ADRSLT, when ADBSY is cleared by the hardware on

completion of the conversion.

ENAD (Address 0xCB)

CHANNEL

MODE

PRESCALER

BUSY

SELECT

ADCH2

ADCH1

ADCH0

ADMOD1

ADMOD0

PSC1

PSC0

ADBSY

Bit 7

Bit 0

CHANNEL SELECT

This 3-bit field selects one of eight channels to be the V

IN+.

The mode selection determines the V

IN− input.

Single Ended mode:

Bit 7

Bit 6

Bit 5

Channel No.

000

001

010

011

100

101

110

111

Differential mode:

Bit 7

Bit 6

Bit 5

Channel Pairs (+, −)

000

0, 1

001

1, 0

010

2, 3

011

3, 2

100

4, 5

101

5, 4

110

6, 7

111

7, 6

MODE SELECT

This 2-bit field is used to select the mode of operation (single

conversion, continuous conversions, differential, single

ended) as shown in the following table.

Bit 4

Bit 3

Mode

Single Ended mode, single

conversion

Single Ended mode, continuous scan

of a single channel into the result

Differential mode, single conversion

Differential mode, continuous scan of

a channel pair into the result register

PRESCALER SELECT

This 2-bit field is used to select one of the four prescaler

clocks for the A/D converter. The following table shows the

various prescaler options.

A/D Converter Clock Prescale

Bit 2

Bit 1

Clock Select

Divide by 2

Divide by 4

Divide by 6

Divide by 12

BUSY BIT

The ADBSY bit of the ENAD register is used to control start-

ing and stopping of the A/D conversion. When ADBSY is

cleared, the prescale logic is disabled and the A/D clock is

turned off. Setting the ADBSY bit starts the A/D clock and ini-

tiates a conversion based on the mode select value currently

in the ENAD register. Normal completion of an A/D conver-

sion clears the ADBSY bit and turns off the A/D converter.

The ADBSY bit remains a one during continuous conversion.

The user can stop continuous conversion by writing a zero to

the ADBSY bit.

If the user wishes to restart a conversion which is already in

progress, this can be accomplished only by writing a zero to

the ADBSY bit to stop the current conversion and then by

writing a one to ADBSY to start a new conversion. This can

be done in two consecutive instructions.

ADC Operation

The A/D converter interface works as follows. Setting the

ADBSY bit in the A/D control register ENAD initiates an A/D

conversion. The conversion sequence starts at the begin-

ning of the write to ENAD operation which sets ADBSY, thus

powering up the A/D. At the first falling edge of the converter

clock following the write operation, the sample signal turns

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