OPA355 datasheet(13/20 Pages) TI

13 / 20 page

OPA657

SBOS197B

www.ti.com

OPERATING SUGGESTIONS

SETTING RESISTOR VALUES TO MINIMIZE NOISE

The OPA657 provides a very low input noise voltage while

requiring a low 14mA of quiescent current. To take full advan-

tage of this low input noise, a careful attention to the other

possible noise contributors is required. Figure 6 shows the op

amp noise analysis model with all the noise terms included. In

this model, all the noise terms are taken to be noise voltage or

current density terms in either nV/ Hz or pA/ Hz.

FREQUENCY RESPONSE CONTROL

Voltage-feedback op amps exhibit decreasing closed-loop

bandwidth as the signal gain is increased. In theory, this

relationship is described by the Gain Bandwidth Product

(GBP) shown in the specifications. Ideally, dividing GBP by

the non-inverting signal gain (also called the Noise Gain, or

NG) will predict the closed-loop bandwidth. In practice, this

only holds true when the phase margin approaches 90

°, as

it does in high-gain configurations. At low gains (increased

feedback factors), most high-speed amplifiers will exhibit a

more complex response with lower phase margin. The

OPA657 is compensated to give a maximally flat 2nd-order

Butterworth closed-loop response at a noninverting gain of

+10 (Figure 1). This results in a typical gain of +10 bandwidth

of 275MHz, far exceeding that predicted by dividing the

1600MHz GBP by 10. Increasing the gain will cause the

phase margin to approach 90

° and the bandwidth to more

closely approach the predicted value of (GBP/NG). At a gain

of +50 the OPA657 will show the 32MHz bandwidth predicted

using the simple formula and the typical GBP of 1600MHz.

Inverting operation offers some interesting opportunities to

increase the available gain-bandwidth product. When the

source impedance is matched by the gain resistor (Figure 2),

the signal gain is –(RF/RG) while the noise gain for bandwidth

purposes is (1 + RF/RG). This cuts the noise gain in half,

increasing the minimum stable gain for inverting operation

under these condition to –12 and the equivalent gain band-

width product to 3.2GHz.

DRIVING CAPACITIVE LOADS

One of the most demanding and yet very common load

conditions for an op amp is capacitive loading. Often, the

capacitive load is the input of an A/D converter — including

additional external capacitance which may be recommended

to improve A/D linearity. A high speed, high open-loop gain

amplifier like the OPA657 can be very susceptible to de-

creased stability and closed-loop response peaking when a

capacitive load is placed directly on the output pin. When the

amplifier’s open loop output resistance is considered, this

capacitive load introduces an additional pole in the signal

path that can decrease the phase margin. Several external

solutions to this problem have been suggested. When the

primary considerations are frequency response flatness, pulse

response fidelity and/or distortion, the simplest and most

effective solution is to isolate the capacitive load from the

feedback loop by inserting a series isolation resistor between

the amplifier output and the capacitive load. This does not

eliminate the pole from the loop response, but rather shifts it

and adds a zero at a higher frequency. The additional zero

acts to cancel the phase lag from the capacitive load pole,

thus increasing the phase margin and improving stability.

The total output spot noise voltage can be computed as the

square root of the squared contributing terms to the output

noise voltage. This computation is adding all the contributing

noise powers at the output by superposition, then taking the

square root to get back to a spot noise voltage. Equation 1

shows the general form for this output noise voltage using

the terms shown in Figure 7:

(1)

kTR

I R

kTR NG

BN SS

BI F

(

) +









(

) +

Dividing this expression by the noise gain (GN = 1 + RF/RG)

will give the equivalent input referred spot noise voltage at

the non-inverting input as shown in Equation 2:

(2)

kTR

NNI

BN SS

BI F

(

) ++ 







Putting high resistor values into Equation 2 can quickly

dominate the total equivalent input referred noise. A source

impedance on the noninverting input of 1.6k

Ω will add a

Johnson voltage noise term equal to just that for the amplifier

itself (5nV/

Hz). While the JFET input of the OPA657 is ideal

for high source impedance applications, both the overall

bandwidth and noise may be limited by these higher source

impedances in the non-inverting configuration of Figure 1.

FIGURE 6. Op Amp Noise Analysis Model.

4kT

OPA657

4kT = 1.6E –20J

at 290

°K

√4kTR

OPA355 Datasheet(PDF) 13 Page - Texas Instruments

OPA355 Datasheet(HTML) 13 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL