DAC0854CIWM datasheet(3/14 Pages) NSC

3 / 14 page

Converter Electrical Characteristics (Continued)

The following specifications apply for AVCC e DVCC e 5V VREF e 265V VBIAS e 14V RL e 2kX (RL is the load resistor on

the analog outputs – pins 1 11 14 and 19) and fCLK e 10 MHz unless otherwise specified Boldface limits apply for TA

TJ from TMIN to TMAX All other limits apply for TA e 25 C

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 3)

(Note 4)

(Limits)

DIGITAL AND DC ELECTRICAL CHARACTERISTICS

VIN(1)

Logical ‘‘1’’ Input Voltage

AVCC e DVCC e 55V

V (min)

VIN(0)

Logical ‘‘0’’ Input Voltage

AVCC e DVCC e 45V

V (max)

IIL

Digital Input Leakage Current

A (max)

CIN

Input Capacitance

COUT

Output Capacitance

VOUT(1)

Logical ‘‘1’’ Output Voltage

ISOURCE e 08 mA

V (min)

VOUT(0)

Logical ‘‘0’’ Output Voltage

ISINK e 32 mA

V (max)

VINT

Interrupt Pin Output Voltage

10 kX Pullup

V (max)

Supply Current

Outputs Unloaded

REFERENCE INPUT CHARACTERISTICS

VREF

Input Voltage Range

0 – 275

RREF

Input Resistance

kX (min)

kX (max)

CREF

Input Capacitance

Full-Scale Data Input

VBIAS INPUT CHARACTERISTICS

VBIAS

VBIAS Input Voltage Range

03 – 14

Input Leakage

CBIAS

Input Capacitance

BANDGAP REFERENCE CHARACTERISTICS

(CL e 220mF)

VREFOUT

Output Voltage

265 g 2%

VREF DT

Tempco

(Note 23)

ppm C

Line Regulation

45V k VCC k 55V IL e 4mA

VREF DIL

Load Regulation

0 k IL k 4mA

0 k IL k 4 mA CMJ Suffix

1 k IL k 0 mA

ISC

Short Circuit Current

VREFOUT e 0V

AC ELECTRICAL CHARACTERISTICS

tDS

Data Setup Time

ns (min)

tDH

Data Hold Time

ns (min)

tCS

Control Setup Time

ns (min)

tCH

Control Hold Time

ns (min)

tMIN

Clock Frequency

MHz (max)

Minimum Clock High Time

ns (min)

Minimum Clock Low Time

ns (min)

DAC0854CIWM Datasheet(PDF) 3 Page - National Semiconductor (TI)

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