DAC0854CIWM datasheet(8/14 Pages) NSC

8 / 14 page

Block Diagram

TLH11261 – 15

Pin Description

VOUT1(19)

The voltage output connections of the

VOUT2(1)

four DACS These provide output

VOUT3(14)

voltages in the range 03V – 28V

VOUT4(11)

VREFOUT(16)

The internal voltage reference output

The output of the reference is 265V

2% This pin should be bypassed with

a 220 mF capacitor

VBIAS1(2)

VBIAS1 is connected to the non-inverting

VBIAS2(13)

inputs of output amplifiers 1 and 2

thereby setting the virtual ground

voltage for DAC’s 1 and 2 while VBIAS2

performs this function for DAC’s 3 and 4

The allowed range is 03V – 14V

GND(7)

The system ground pin Connect to

clean ground point

DVCC(10)

The digital and analog power supply

AVCC(17)

pins The power supply range of the

DAC0854 is 45V – 55V To guarantee

accuracy it is required that the AVCC

and DVCC pins be bypassed separately

with bypass capacitors of 10 mF

tantalum in parallel with 01 mF ceramic

AU(4)

When this pin is taken low all DAC outputs

will be asynchronously updated CS must be

held high during the update

VREF1(18)

The voltage reference inputs for the four

VREF2(20)

DACs The allowed range is 0V – 275V

VREF3(15)

VREF4(12)

CS(3)

The Chip Select control input This input is

active low

CLK(5)

The external clock input pin

DI(9)

The serial data input The data is clocked in

LSB first Preceding the data byte are 4 or 6

bits of instructions

DO(6)

The serial data output The data can be

clocked out either MSB or LSB first and on

either the positive or negative edge of the

clock

INT(8)

The power interrupt output On an

interruption of the power supply this pin

goes low Since this pin has an open drain

output a 10 kX pull-up resistor must be

connected to the supply

DAC0854CIWM Datasheet(PDF) 8 Page - National Semiconductor (TI)

DAC0854CIWM Datasheet(HTML) 8 Page - National Semiconductor (TI)

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