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COP8CCE9IMT7/NOPB Datasheet(PDF) 13 Page - Texas Instruments |
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COP8CCE9IMT7/NOPB Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 101 page  COP8CCE9 www.ti.com SNOS978J – JUNE 2001 – REVISED MARCH 2013 DC Electrical Characteristics ( −40°C ≤ T A≤ +125°C) (continued) Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Parameter Conditions Min Typ Max Units All Others Source (Weak Pull-Up Mode) VCC = 4.5V, VOH = 3.8V −9 μA Source (Push-Pull Mode) VCC = 4.5V, VOH = 3.8V −6.3 mA Sink (Push-Pull Mode) (4) VCC= 4.5V, VOL = 1.0V 9 mA Allowable Sink and Source Current per Pin 12 mA TRI-STATE Leakage VCC = 5.5V −3 +3 μA Maximum Input Current without Latchup (5) ±200 mA RAM Retention Voltage, VR (in HALT Mode) 2.0 V Input Capacitance 7 pF Voltage on G6 to Force Execution from Boot ROM (6) G6 rise time must be slower 2 x VCC VCC + 7 V than 100 ns G6 Rise Time to Force Execution from Boot ROM 100 nS Input Current on G6 when Input > VCC VIN = 11V, VCC = 5.5V 500 μA (5) Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages > VCC and the pins will have sink current to VCC when biased at voltages > VCC (the pins do not have source current when biased at a voltage below VCC). These two pins will not latch up. The voltage at the pins must be limited to < 14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes ESD transients. (6) Vcc must be valid and stable before G6 is raised to a high voltage. Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: COP8CCE9 |
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