DEN

VODSEL

TRFB

24

REN

RRFB

RPWDNB

TCLK

TPWDNB

SERIALIZER ± DS99R105

PLL

Timing

and

Control

RIN-

DESERIALIZER ± DS99R106

PLL

Timing

and

Control

24

LOCK

RCLK

Clock

Recovery

PRE (on/off)

DS99R105, DS99R106

SNLS242D – MARCH 2007 – REVISED APRIL 2013

www.ti.com

Block Diagram

Figure 1.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

Submit Documentation Feedback

Copyright © 2007–2013, Texas Instruments Incorporated

Product Folder Links: DS99R105 DS99R106