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DS99R105VS/NOPB Datasheet(PDF) 10 Page - Texas Instruments |
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DS99R105VS/NOPB Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 29 page ![]() VOH REN VOL + 0.5V VOL ROUT [23:0] VOL + 0.5V tLZR 500: VREF = VDD/2 for tZLR or tLZR, VOH - 0.5V VOH + 0.5V tZLR tHZR tZHR VDD/2 VDD/2 VOH VOL REN VREF + - VREF = 0V for tZHR or tHZR CL = 8pF 23 2 1 0 START BIT STOP BIT SYMBOL N+3 23 2 1 0 START BIT STOP BIT SYMBOL N+2 23 2 1 0 START BIT STOP BIT SYMBOL N+1 23 2 1 0 START BIT STOP BIT SYMBOL N RIN0-23 DCA, DCB RCLK tDD ROUT0-23 SYMBOL N-1 SYMBOL N SYMBOL N-2 SYMBOL N-3 80% 20% 80% 20% tCLH Deserializer 8 pF lumped Single-ended Signal tCHL DS99R105, DS99R106 SNLS242D – MARCH 2007 – REVISED APRIL 2013 www.ti.com Figure 12. Deserializer LVCMOS/LVTTL Output Load and Transition Times See Serializer Timing Requirements for TCLK Note (1). Figure 13. Deserializer Delay Note: CL includes instrumentation and fixture capacitance within 6 cm of ROUT[23:0] Figure 14. Deserializer TRI-STATE Test Circuit and Timing 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS99R105 DS99R106 |
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