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DP8391AV Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8391AV
Description  SNI Serial Network Interface
PDF  12 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8391AV Datasheet(HTML) 5 Page - National Semiconductor (TI)

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50 Pin Descriptions
Pin No
Name
IO
Description
(DIP)
(PCC)
1
1
COL
O
Collision Detect Output
A TTLMOS level active high output A 10 MHz
(a25% – 15%) signal at the collision input will produce a logic high at COL
output When no signal is present at the collision input COL output will go low
2
2
RXD
O
Receive Data Output
A TTLMOS level signal This is the NRZ data output
from the digital phase-locked loop This signal should be sampled by the
controller at the rising edge of receive clock
3
3
CRS
O
Carrier Sense
A TTLMOS level active high signal It is asserted when valid
data from the transceiver is present at the receive input It is de-asserted one
and a half bit times after the last bit at receive input
4
4
RXC
O
Receive Clock
A TTLMOS level recovered clock When the phase-locked loop
locks to a valid incoming signal a 10 MHz clock signal is activated on this output
This output remains low during idle (5 bit times after activity ceases at receive
input)
5
5
SEL
I
Mode Select
A TTL level input When high transmit a and transmit b outputs
are at the same voltage in idle state providing a ‘‘zero’’ differential When low
transmit a is positive with respect to transmit b in idle state
6
6–9
GND
Negative Supply Pins
7
10
LBK
I
Loopback
A TTL level active high on this input enables the loopback mode
811
X1
I
Crystal or External Frequency Source Input (TTL)
912
X2
O
Crystal Feedback Output
This output is used in the crystal connection only It
must be left open when driving X1 with an external frequency source
10
13
TXD
I
Transmit Data
A TTL level input This signal is sampled by the SNI at the rising
edge of transmit clock when transmit enable input is high The SNI combines
transmit data and transmit clock signals into a Manchester encoded bit stream
and sends it differentially to the transceiver
11
14
TXC
O
Transmit Clock
A TTLMOS level 10 MHz clock signal derived from the 20
MHz oscillator This clock signal is always active
12
15
TXE
I
Transmit Enable
A TTL level active high data encoder enable input This signal
is also sampled by the SNI at the rising edge of transmit clock
13
16
TXb
O
Transmit Output
Differential line driver which sends the encoded data to the
transceiver These outputs are source followers and require 270X pulldown
14
17
TXa
resistors to GND
15
18
NC
No Connection
16
17
19
CAP
O
Bypass Capacitor
A ceramic capacitor (greater than 0001 mF) must be
connected from this pin to GND
18
20 – 23
VCC
Positive Supply Pins
A 01 mF ceramic decoupling capacitor must be
connected across VCC and GND as close to the device as possible
19
20
24
NC
No Connection
21
25
RXb
I
Receive Input
Differential receive input pair from the transceiver
22
26
RXa
23
27
CDb
I
Collision Input
Differential collision input pair from the transceiver
24
28
CDa
5



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