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SCAN25100TYAX/NOPB Datasheet(PDF) 5 Page - Texas Instruments |
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SCAN25100TYAX/NOPB Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 38 page ![]() SCAN25100 www.ti.com SNLS223C – SEPTEMBER 2006 – REVISED APRIL 2013 PIN DESCRIPTIONS(1) (continued) Pin # Pin Name I/O, Type Description 99 LOOP [0] I, LVTTL or 1.8V Loop back configuration. 100 LOOP [1] LVCMOS, Internal Pulling both pins low enables MDIO control. pull down Note: During Special line (remote) loop back mode, the output de-emphasis control is disabled. LOOP [1] LOOP [0] 0 0 Normal mode—no loop back 0 1 Line (remote) loop back mode 1 0 Local loop back mode 1 1 Special line (remote) loop back mode MDC/MDIO 30 MDC 3.3V LVTTL MDC/MDIO configuration bus. 31 MDIO Internal pull up on Protocol per IEEE 802.2ae-2002 MDC/MDIO Clause 45. These pins are 3.3V LVTTL 37 ADD0 ADDR pins compatible, not 1.2V signal compatible. 36 ADD1 35 ADD2 34 ADD3 33 ADD4 IEEE 1149.1 (JTAG) 45 TDI 3.3V LVTTL JTAG test bus for IEEE 1149.1 and 1149.6 support. 41 TDO Internal pull up on 44 TMS TDI, TMS, and 43 TCK TRSTB 46 TRSTB RESERVED PINS 83 RES1 I Reserved. 84 RES2 Tie with 5 K Ω resistor to ground. POWER 9, 15, 20, AVDD18 I, Power 1.8V analog supply. 32, 38, 47, 85 8, 14, 21, AVDD33 I, Power 3.3V analog supply. 42 1, 2, 28, PVDD33 I, Power 3.3V PLL supply (minimize supply noise to < 100 mV peak-to-peak). 29 50, 51, 76, IOVDD I, Power 1.8V or 3.3V parallel I/O bus and control pin supply. 87 See VSEL pin description for additional information. GROUND 3, 4, 5, 10, GND I, Ground Device ground. 13, 16, 19, 24, 25, 26, 27, 39, 40, 48, 49, 63, 75, 86 GROUND DAP 101 GND I, Ground Device ground. Pad must be soldered and contected to GND plane with a minimum of 8 thermal vias to achieve specified thermal performance. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: SCAN25100 |
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