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LM3405 Datasheet(PDF) 17 Page - Texas Instruments |
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LM3405 Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 29 page ![]() LM3405 www.ti.com SNVS429B – OCTOBER 2006 – REVISED MAY 2013 PCB Layout Considerations When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration when completing the layout is the close coupling of the GND connections of the input capacitor C1 and the catch diode D1. These ground ends should be close to one another and be connected to the GND plane with at least two through-holes. Place these components as close to the IC as possible. The next consideration is the location of the GND connection of the output capacitor C2, which should be near the GND connections of C1 and D1. There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island. The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup that causes inaccurate regulation. The LED current setting resistor R1 should be placed as close as possible to the IC, with the GND of R1 placed as close as possible to the GND of the IC. The VOUT trace to LED anode should be routed away from the inductor and any other traces that are switching. High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible. Radiated noise can be decreased by choosing a shielded inductor. The remaining components should also be placed as close as possible to the IC. Please see Application Note AN-1229 for further considerations and the LM3405 demo board as an example of a four-layer layout. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: LM3405 |
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