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VT8501 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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VT8501 Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
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4 / 17 page ![]() VT8501 Apollo MVP4 Revision 1.3 February 1, 2000 -ii- Table of Contents 7HFKQRORJLHV ,QF 'HOLYHULQJ 9DOXH 'HOLYHULQJ 9DOXH TABLE OF CONTENTS REVISION HISTORY........................................................................................................................................................................I TABLE OF CONTENTS .................................................................................................................................................................. II LIST OF FIGURES..........................................................................................................................................................................IV LIST OF TABLES ...........................................................................................................................................................................IV APOLLO MVP4................................................................................................................................................................................. 1 SYSTEM OVERVIEW...................................................................................................................................................................... 6 APOLLO MVP4 CORE LOGIC OVERVIEW.................................................................................................................................... 7 APOLLO MVP4 GRAPHICS CONTROLLER OVERVIEW ................................................................................................................ 8 Capability Overview ............................................................................................................................................................... 8 System Capabilities................................................................................................................................................................. 9 High Performance 64-bit 2D GUI.......................................................................................................................................... 9 Highly Integrated RAMDAC TM & Clock Synthesizer......................................................................................................... 9 Full Feature High Performance 3D Engine .......................................................................................................................... 9 Video Processor..................................................................................................................................................................... 10 Video Capture and DVD ...................................................................................................................................................... 10 Versatile Frame Buffer Interface ........................................................................................................................................ 10 Hi-Res and Hi-Ref Display Support .................................................................................................................................... 10 CRT Power Management (VESA DPMS) .......................................................................................................................... 11 Digital Flat Panel (DFP) Interface ...................................................................................................................................... 11 Video Capture Interface / ZV Port...................................................................................................................................... 11 Complete Hardware Compatibility ..................................................................................................................................... 11 PINOUTS .......................................................................................................................................................................................... 12 PIN DESCRIPTIONS ...................................................................................................................................................................... 15 REGISTERS ..................................................................................................................................................................................... 24 REGISTER OVERVIEW ................................................................................................................................................................. 24 MISCELLANEOUS I/O................................................................................................................................................................... 34 CONFIGURATION SPACE I/O ....................................................................................................................................................... 34 REGISTER DESCRIPTIONS............................................................................................................................................................ 35 Bus 0 Device 0 Header Registers - Host Bridge.................................................................................................................. 35 Device 0 Configuration Registers - Host Bridge ................................................................................................................ 37 Cache Control ....................................................................................................................................................................................... 37 DRAM Control ..................................................................................................................................................................................... 39 PCI Bus Control.................................................................................................................................................................................... 46 GART / Graphics Aperture Control ...................................................................................................................................................... 50 AGP Control ......................................................................................................................................................................................... 52 Bus 0 Device 1 Header Registers - PCI-to-PCI Bridge...................................................................................................... 54 Device 1 Configuration Registers - PCI-to-AGP Bridge ................................................................................................... 57 AGP Bus Control .................................................................................................................................................................................. 57 Bus 1 Device 0 - 2D / 3D Graphics Accelerator Registers ................................................................................................. 59 PCI Configuration Registers – Graphics Accelerator............................................................................................................................ 59 PCI Device-Specific Config Regs – Graphics Accelerator ................................................................................................................... 62 Graphics Accelerator PCI Bus Master Registers................................................................................................................................... 63 VGA Standard Registers - Introduction ................................................................................................................................................ 69 Capture / ZV Port Registers .................................................................................................................................................................. 70 DVD Registers ...................................................................................................................................................................................... 71 Attribute Controller Registers (AR) ...................................................................................................................................................... 74 |
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