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LM3424 Datasheet(PDF) 3 Page - Texas Instruments |
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LM3424 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 69 page  VIN nDIM TGAIN TSENSE CSH RT GATE 1 COMP HSN DAP SLOPE 2 3 4 5 6 7 20 19 18 17 16 15 14 DDRV GND HSP VCC 21 8 9 10 13 12 11 OVP VS IS TREF SS EN LM3424, LM3424-Q1 www.ti.com SNVS603C – AUGUST 2009 – REVISED AUGUST 2015 5 Pin Configuration and Functions PWP Package 20-Pin HTSSOP With PowerPAD™ Top View Pin Functions PIN I/O DESCRIPTION NO. NAME Bypass with 100 nF capacitor to GND as close to the device as 1 VIN I Input Voltage possible. Connect to > 2.4V to enable the device or to < 0.8V for low power 2 EN I Enable shutdown. 3 COMP I Compensation Connect a capacitor to GND to compensate control loop. Connect a resistor to GND to set the signal current. Can also be used to 4 CSH I Current Sense High analog dim as explained in the Thermal Foldback and Analog Dimming section. Connect a resistor to GND to set the switching frequency. Can also be 5 RT I Resistor Timing used to synchronize to an external clock as explained in the Switching Frequency section. Connect a PWM signal for dimming as detailed in the PWM Dimming Dimming Input / 6 nDIM I section and/or a resistor divider from VIN to program input under-voltage Under-Voltage Protection lockout. 7 SS I Soft-start Connect a capacitor to GND to extend start-up time. 8 TGAIN I Temp Foldback Gain Connect a resistor to GND to set the foldback slope. Connect a resistor/ thermistor divider from VS to sense the temperature 9 TSENSE I Temp Sense Input as explained in the Thermal Foldback and Analog Dimming section. 10 TREF I Temp Foldback Reference Connect a resistor divider from VS to set the foldback reference voltage. 2.45V reference for temperature foldback circuit and other external 11 VS O Voltage Reference circuitry. Connect a resistor divider from VO to program output over-voltage 12 OVP I Over-Voltage Protection lockout. 13 DDRV O Dimming Gate Drive Output Connect to gate of dimming MOSFET. 14 GND GND Ground Connect to DAP to provide proper system GND 15 GATE O Main Gate Drive Output Connect to gate of main switching MOSFET. 16 VCC O Internal Regulator Output Bypass with a 2.2 µF – 3.3 µF ceramic capacitor to GND. Connect to the drain of the main N-channel MOSFET switch for RDS-ON 17 IS I Main Switch Current Sense sensing or to a sense resistor installed in the source of the same device. 18 SLOPE I Slope Compensation Connect a resistor to GND to set slope of additional ramp. Connect through a series resistor to LED current sense resistor 19 HSN I LED Current Sense Negative (negative). Connect through a series resistor to LED current sense resistor 20 HSP I LED Current Sense Positive (positive). DAP DAP GND Thermal pad on bottom of IC Connect to GND. Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM3424 LM3424-Q1 |
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