SCL

SDIO

data

change

allowed

data

valid

data

change

allowed

data

valid

data

change

allowed

LM3535

SNVS598A – AUGUST 2010 – REVISED MAY 2013

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LED Forward Voltage Monitoring

The LM3535 has the ability to switch gains (1x or 3/2x) based on the forward voltage of the LED load. This ability

to switch gains maximizes efficiency for a given load. Forward voltage monitoring occurs on all diode pins. At

active Dxx pins reaches a voltage approximately equal to 130mV, the charge pump will switch to the gain of 3/2.

This switch-over ensures that the current through the LEDs never becomes pinched off due to a lack of

headroom across the current sinks. Once a gain transition occurs, the LM3535 will remain in the gain of 3/2

select the appropriate gain.

Only active Dxx pins will be monitored.

Configurable Gain Transition Delay

To optimize efficiency, the LM3535 has a user selectable gain transition delay that allows the part to ignore short

duration input voltage drops. By default, the LM3535 will not change gains if the input voltage dip is shorter than

3 to 6 milliseconds. There are four selectable gain transition delay ranges (4 for LM3535-2ALS and 3 for

LM3535) available on the LM3535. All delay ranges are set within the VF Monitor Delay Register . Please refer to

the INTERNAL REGISTERS OF LM3535 section of this datasheet for more information regarding the delay

ranges.

Hardware Enable (HWEN)

The LM3535 has a hardware enable/reset pin (HWEN) that allows the device to be disabled by an external

(logic '1') to prevent an unwanted reset. When the HWEN is driven low (logic '0'), all internal control registers

reset to the default states and the part becomes disabled. Please see the Electrical Characteristics(1)(2) section of

the datasheet for required voltage thresholds.

DATA VALIDITY

The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, state of

the data line can only be changed when SCL is LOW.

Figure 27. Data Validity Diagram

while using a smaller pull-up results in higher switching currents with faster edges.

(1)

All voltages are with respect to the potential at the GND pins.

(2)

Min and Max limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely

norm.

12

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