1

4

5

2

6

7

8

3

LM3557

SNVS338B – NOVEMBER 2004 – REVISED FEBRUARY 2013

www.ti.com

Connection Diagram

Figure 2. 8-Lead Thin WSON Package

(Top View)

PIN DESCRIPTIONS

Name

Pin No.

Description

Sw1

1

Drain Connection of the Internal Power Field Effect Transistor (FET) Switch (Figure 3: N1)

2

Input Voltage Connection

NC

3

No Connection

En

4

Device Enable Connection

Ovp

5

Over-Voltage Protection Input Connection

Fb

6

Feedback Voltage Connection

Sw2

7

Drain Connection of an Internal Field Effect Transistor (FET) Switch (Figure 3: N2)

Gnd

8

Ground Connection

DAP

DAP

Die Attach Pad (DAP), must be soldered to the printed circuit board's ground plane for enhanced thermal dissipation

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

−0.3V to +8V

En Pin

−0.3V to +8V

Fb Pin

−0.3V to +8V

Sw2 Pin

−0.3V to +8V

Ovp Pin

−0.3V to +30V

Sw1 Pin

−0.3V to +40V

Continuous Power Dissipation

Internally Limited

Maximum Junction Temperature

+150°C

Storage Temperature Range

−65°C to +150°C

Human Body Model

2 kV

Machine Model

150V

(1)

Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not

apply when operating the device outside of its rated operating conditions.

(2)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for

availability and specifications.

(3)

The human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. The machine model is a 200 pF

capacitor discharged directly into each pin.

2

Submit Documentation Feedback

Copyright © 2004–2013, Texas Instruments Incorporated

Product Folder Links: LM3557