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DS1221 Datasheet(PDF) 5 Page - Dallas Semiconductor

Part # DS1221
Description  Nonvolatile Controller x 4 Chip
PDF  8 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1221 Datasheet(HTML) 5 Page - Dallas Semiconductor

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DS1221
5 of 8
CAPACITANCE
(tA = 25°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Capacitance
CIN
5pF
Output Capacitance
COUT
7pF
AC ELECTRICAL CHARACTERISTICS
(0
°C to 70°C; V
CC = 4.5 to 5.5V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
CE
Propagation Delay
tPD
515
25
ns
5
CE
High to Power-Fail
tPF
0ns
Address Setup
tAS
20
ns
9
(0
°C to 70°C; V
CC < 4.5V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Recovery at Power-Up
tREC
25
10
ms
VCC Slew Rate 4.5 - 4.25V
tF
300
µs
VCC Slew Rate 4.25 - 3V
tFB
10
µs
VCC Slew Rate 4.25 - 4.5V
tR
0µs
CE
Pulse Width
tCE
1.5
µs
7, 8
NOTES:
1. All voltages are referenced to ground.
2. Only one battery input is required.
3. Measured with VCCO and CE0 - CE3 open.
4. ICCO1 is the maximum average load which the DS1221 can supply to the memories.
5. Measured with a load as shown in Figure 4.
6. ICCO2 is the maximum average load current which the DS1221 can supply to the memories in the
battery back-up mode.
7. Chip enable outputs CE0 - CE3 can only sustain leakage current in the battery back-up mode.
8. tCE max. must be met to ensure data integrity on power loss.
9. tAS is only required to keep the decoder outputs glitch-free. While CE is low, the outputs ( CE0 - CE3 )
will be defined by inputs A and B with a propagation delay of tPD from an A or B input change.
10. For applications where higher currents are required, please see the DS1259 Battery Manager Chip
data sheet.



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