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LP3470 Datasheet(PDF) 3 Page - Texas Instruments |
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LP3470 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 22 page  1 SRT 2 GND 3 VCC1 4 VCC 5 Reset 3 LP3470 www.ti.com SNVS003G – JUNE 1999 – REVISED APRIL 2016 Product Folder Links: LP3470 Submit Documentation Feedback Copyright © 1999–2016, Texas Instruments Incorporated 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View Pin Functions PIN I/O DESCRIPTION NO. NAME 1 SRT O Set reset time-out. Connect a capacitor between this pin and ground to select the reset time-out period (tRP). tRP = 2000 × C1 (C1 in µF and tRP in ms). If no capacitor is connected, leave this pin floating. 2 GND — Ground pin. 3 VCC1 I Always connect to pin VCC (Pin 4). 4 VCC I Supply voltage, and reset threshold monitor input. 5 Reset O Open-drain, active-low reset output. Connect to an external pullup resistor. Reset changes from high to low whenever the monitored voltage (VCC) drops below the reset threshold voltage (VRTH). Once VCC exceeds VRTH, Reset remains low for the reset time-out period (tRP) and then goes high. |
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