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LP3470 Datasheet(PDF) 11 Page - Texas Instruments |
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LP3470 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 22 page ![]() 11 LP3470 www.ti.com SNVS003G – JUNE 1999 – REVISED APRIL 2016 Product Folder Links: LP3470 Submit Documentation Feedback Copyright © 1999–2016, Texas Instruments Incorporated 8.2.2 Detailed Design Procedure The minimum application circuit requires the LP3470 Power-On Reset Circuit IC and a pullup resistor connecting the reset pin to VCC. The reset delay can be programmed with an additional capacitor connected from the SRT pin to GND. See Reset Time-Out Period and Pullup Resistor Selection for information on choosing specific values for components. 8.2.3 Application Curves Two capacitor values for CD (0.1 µF and 1 µF) are used as examples to show the programmability of the output time delay as shown in Figure 11 and Figure 12. Figure 11. 0.1-µF Capacitor Programmed Delay Figure 12. 1-µF Capacitor Programmed Delay |
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